參數(shù)資料
型號: KMM372V400CS
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 3.3V
中文描述: 4米× 72的DRAM內(nèi)存的ECC的使用4Mx4,4K的2K刷新,3.3
文件頁數(shù): 5/19頁
文件大?。?/td> 411K
代理商: KMM372V400CS
DRAM MODULE
KMM372V410CK/CS
KMM372V400CK/CS
Test condition : V
ih
/V
il
=2.0/0.8V, V
oh
/V
ol
=2.0/0.8V, Output loading CL=100pF
Parameter
Symbol
-5
-6
Unit
Note
Min
53
71
10
8
3
Max
Min
60
83
10
8
3
Max
CAS precharge to W delay time
RAS to W delay time
CAS setup time(CAS-before-RAS refresh)
CAS hold time(CAS-before-RAS refresh)
RAS precharge to CAS hold time
Access time from CAS precharge
Fast page mode cycle time
Fast page mode read-modify-write cycle time
CAS precharge time(Fast page cycle)
RAS pulse width (Fast page cycle)
RAS hold time from CAS precharge
W to RAS precharge time (C-B-R refresh)
W to RAS hold time (C-B-R refresh)
CAS precharge(C-B-R counter test)
OE access time
OE to data delay
Output buffer turn off delay time from OE
OE command hold time
t
CPWD
t
RWD
t
CSR
t
CHR
t
RPC
t
CPA
t
PC
t
PRWC
t
CP
t
RASP
t
RHCP
t
WRP
t
WRH
t
CPT
t
OEA
t
OED
t
OEZ
t
OEH
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
7,11
11
11
11
3,11
35
40
35
75
10
50
35
15
8
20
40
80
10
60
40
15
8
20
200K
200K
11
11
11
18
20
11
11
11
18
5
13
20
5
15
18
20
PDE to Valid PD bit
PDE to PD bit Inactive
t
PD
t
PDOFF
10
7
10
7
ns
ns
2
2
Present Detect Read Cycle
AC CHARACTERISTICS
(0
°
C
T
A
70
°
C, V
CC
=3.3V
±
0.3V. See notes 1,2.)
相關(guān)PDF資料
PDF描述
KMM372V410CK 4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 3.3V
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KMM372V803BK 8Mx72 DRAM DIMM(8Mx72 動態(tài) RAM模塊)
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