參數(shù)資料
型號(hào): KMPC8315CVRAGDA
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 65/106頁(yè)
文件大?。?/td> 0K
描述: IC MPU POWERQUICC II 620-PBGA
標(biāo)準(zhǔn)包裝: 2
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 620-BBGA 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 620-PBGA(29x29)
包裝: 托盤(pán)
MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
61
PCI Express
16 PCI Express
This section describes the DC and AC electrical specifications for the PCI Express bus of the MPC8315E.
16.1
DC Requirements for PCI Express SD_REF_CLK and
SD_REF_CLK
For more information, see Section 15.2, “SerDes Reference Clocks.”
16.2
AC Requirements for PCI Express SerDes Clocks
This table lists the PCI Express SerDes clock AC requirements.
16.3
Clocking Dependencies
The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million (ppm)
of each other at all times. This is specified to allow bit rate clock sources with a ±300 ppm tolerance.
16.4
Physical Layer Specifications
Following is a summary of the specifications for the physical layer of PCI Express on this device. For
further details as well as the specifications of the transport and data link layer please use the PCI Express
Base Specification, Rev. 1.0a.
16.4.1
Differential Transmitter (TX) Output
This table defines the specifications for the differential output at all transmitters (TXs). The parameters are
specified at the component pins.
Table 53. SD_REF_CLK and SD_REF_CLK AC Requirements
Symbol
Parameter Description
Min
Typ
Max
Unit
Note
tREF
REFCLK cycle time
10
ns
tREFCJ
REFCLK cycle-to-cycle jitter. Difference in the period of any two adjacent
REFCLK cycles.
——
100
ps
tREFPJ
Phase jitter. Deviation in edge location with respect to mean edge location.
–50
50
ps
Table 54. Differential Transmitter (TX) Output Specifications
Parameter
Symbol
Comments
Min
Typical
Max
Unit
Note
Unit interval
UI
Each UI is 400 ps ± 300 ppm. UI does not
account for Spread Spectrum Clock
dictated variations.
399.88
400
400.12
ps
1
Differential peak-to-peak
output voltage
VTX-DIFFp-p
VTX-DIFFp-p = 2*|VTX-D+ - VTX-D-|
0.8
1.2
V
2
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