參數(shù)資料
型號(hào)： KMPC8347EVVAJF
廠商： Freescale Semiconductor
文件頁數(shù)： 64/99頁
文件大小： 0K
描述： IC MPU PWRQUICC II 672-TBGA
標(biāo)準(zhǔn)包裝： 2
系列： MPC83xx
處理器類型： 32-位 MPC83xx PowerQUICC II Pro
速度： 533MHz
電壓： 1.2V
安裝類型： 表面貼裝
封裝/外殼： 672-LBGA
供應(yīng)商設(shè)備封裝： 672-TBGA（35x35）
包裝： 托盤
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Freescale Semiconductor
67
Package and Pin Listings
Table 56 provides the pinout listing for the MPC8347EA, 620 PBGA package.
No Connection
NC
W32, AA31, AA32, AA33, AA34,
AB31, AB32, AB33, AB34, AC29,
AC31, AC33, AC34, AD30, AD32,
AD33, AD34, AE29, AE30, AH32,
AH33, AH34, AM33, AJ31, AJ32,
AJ33, AJ34, AK32, AK33, AK34,
AM34, AL33, AL34, AK31, AH30,
AC32, AE32, AH31, AL32, AG34,
AE33, AF32, AE34, AF34, AF33,
AG33, AG32, AL11, AM11, AP10, Y32,
Y34, Y31, Y33
——
—
Notes:
1. This pin is an open-drain signal. A weak pull-up resistor (1 k
Ω) should be placed on this pin to OV
DD.
2. This pin is an open-drain signal. A weak pull-up resistor (2–10 k
Ω) should be placed on this pin to OV
DD.
3. During reset, this output is actively driven rather than three-stated.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull-up if the chip is in PCI host mode. Follow the PCI specifications.
6. This pin must always be tied to GND.
7. This pin must always be pulled up to OVDD.
8. This pin must always be left not connected.
9. Thermal sensitive resistor.
10.It is recommended that MDIC0 be tied to GRD using an 18
Ω resistor and MDIC1 be tied to DDR power using an 18 Ω
resistor.
11.TSEC1_TXD[3] is required an external pull-up resistor. For proper functionality of the device, this pin must be pulled up or
actively driven high during a hard reset. No external pull-down resistors are allowed to be attached to this net.
12. A weak pull-up resistor (2–10 k
Ω) should be placed on this pin to LV
DD1.
13. For systems that boot from local bus (GPCM)-controlled NOR flash, a pullup on LGPL4 is required.
Table 56. MPC8347EA (PBGA) Pinout Listing
Signal
Package Pin Number
Pin Type
Power
Supply
Notes
PCI
PCI1_INTA/IRQ_OUT
D20
O
OVDD
2
PCI1_RESET_OUT
B21
O
OVDD
—
PCI1_AD[31:0]
E19, D17, A16, A18, B17, B16, D16,
B18, E17, E16, A15, C16, D15, D14,
C14, A12, D12, B11, C11, E12, A10,
C10, A9, E11, E10, B9, B8, D9, A8,
C9, D8, C8
I/O
OVDD
—
PCI1_C/BE[3:0]
A17, A14, A11, B10
I/O
OVDD
—
PCI1_PAR
D13
I/O
OVDD
—
PCI1_FRAME
B14
I/O
OVDD
5
Table 55. MPC8347EA (TBGA) Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Power
Supply
Notes
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