參數(shù)資料
型號: KMPC8347EZUAJF
廠商: Freescale Semiconductor
文件頁數(shù): 2/99頁
文件大?。?/td> 0K
描述: IC MPU PWRQUICC II 672-TBGA
標(biāo)準(zhǔn)包裝: 2
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 533MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 672-LBGA
供應(yīng)商設(shè)備封裝: 672-TBGA(35x35)
包裝: 托盤
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
10
Freescale Semiconductor
Power Characteristics
supplies are stable and if the I/O voltages are supplied before the core voltage, there may be a period of
time that all input and output pins will actively be driven and cause contention and excessive current from
3A to 5A. In order to avoid actively driving the I/O pins and to eliminate excessive current draw, apply the
core voltage (VDD) before the I/O voltage (GVDD, LVDD, and OVDD) and assert PORESET before the
power supplies fully ramp up. In the case where the core voltage is applied first, the core voltage supply
must rise to 90% of its nominal value before the I/O supplies reach 0.7 V, see Figure 4.
Figure 4. Power Sequencing Example
I/O voltage supplies (GVDD, LVDD, and OVDD) do not have any ordering requirements with respect to one
another.
3
Power Characteristics
The estimated typical power dissipation for the MPC8347EA device is shown in Table 4.
Table 4. MPC8347EA Power Dissipation1
Core
Frequency
(MHz)
CSB
Frequency
(MHz)
Typical at TJ = 65
Typical2
,3
Maximum4
Unit
PBGA
266
1.3
1.6
1.8
W
133
1.1
1.4
1.6
W
400
266
1.5
1.9
2.1
W
133
1.4
1.7
1.9
W
400
200
1.5
1.8
2.0
W
100
1.3
1.7
1.9
W
I/O Voltage (GVDD, LVDD, OVDD)
Core Voltage (VDD, AVDD)
90%
0.7 V
Time
Voltage
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