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參數(shù)資料
| 型號： | KS16118 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 9600bps FAX super one-chip(9600bps傳真調(diào)制解調(diào)器) |
| 中文描述： | 為9600bps傳真超級單芯片（為9600bps傳真調(diào)制解調(diào)器） |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 28K |
| 代理商： | KS16118 |
KS16118 -
9600bps FAX super one-chip
- 1 -
ELECTRONICS
Dec. 1997
Version 1.0
FEATURES
CPU
- SAM8 CPU core
Memory
- 64-Kbyte external data or peripheral mem-
ory
- 64-Kbyte external program memory
- 128 general purpose registers
- 16 working registers
- 104 system and peripheral registers
Interrupts
- 5 interrupt levels
- 10 interrupt sources with 9 vectors
- Fast interrupt processing
Watchdog Timer
- 8-bit timer for noise protection or interrupts
I/O Ports
- Five output ports (32 pins)
- One input port (4 pins)
- Three bidirectional ports (20 pins)
Serial Ports
- 2 channel serial I/O for serial communication
to an operational panel, etc.
8-bit Timer
- An 8-bit timer for timing schedule
- Auto-reload method
External Interface
- Programmable waits for external memory
and peripheral chip selection
- Three DMA channels
Tone Generator
- 366 Hz to 93.75 KHz at 12 MHz CPU clock
Real Time Clock
- Operate with 3V backup battery
- Low power consumption
A/D Converter
- Two channels for TPH and scanner input
- Half-flash, 6-bit resolution
- 8 CPU-clocks peak conversion time
Scanner Control Block
- 1728 or 2048-pixel scan width
- Minimum scanning time: 5ms
Image Processing Unit
- Decimation by 1% (up to 50%)
- Shading correction for A4 and B4 size
- 64-gray level half-tone processing
- 2048X6 bits line memory for error diffusion
- 2048X6 bits line memory for shading correc-
tion
- 64X6 bits line memory for gamma-correction
- Edge emphasis and edge strength
- Programmable threshold generation
- Peak value detection
TPH Interface Block
- Up to 4 TPH strobes
Changing Element Generator (CEG)
- For T.4 MH/MR compression and decom-
pression
Modem
- Group 3 facsimile transmission/reception
according to ITU-T V.29, V.27ter short and
long train, V.21 Ch2, T.30, and T.4
- Half-duplex operation
- Receiver dynamic range: 0 dBm to -43 dBm
- Programmable transmit level: 0 dBm to -15
dBm
INTRODUCTION
The KS16118 is a facsimile controller that provides major functions on a sin-
gle chip. It contains a fax modem with an Analog Front-End (AFE), a CPU,
an image processor with a codec accelerator, CPU peripheral circuits, and
general purpose I/O ports. The peripheral circuits include an 8-bit timer, 2-
channel Serial I/O (SIO), 3-channel direct memory access (DMA), a real
time clock, and a tone generator. The fax modem, which is functionally the
same as the KS16116, is a synchronous, half-duplex modem capable of
speeds up to 9600 bps. The image processor includes a 6-bit half-flash A/D
converter, a scanner controller, THP interfaces, and a codec accelerator.
Each functional block is equipped with many versatile functions. All func-
tions necessary for home facsimile machine as well as small business fac-
simile machine are intergrated in a single chip. The KS16118 is housed in
144-QFP and operates with +5V single power.
144-QFP-2828-AN
KS16118
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