參數(shù)資料
型號(hào): KS2501
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: OSD Processor for Monitor(用于監(jiān)視器的OSD處理器)
中文描述: OSD處理器(用于監(jiān)視器的OSD處理器的監(jiān)視器)
文件頁數(shù): 20/26頁
文件大?。?/td> 230K
代理商: KS2501
KS2501
OSD PROCESSOR FOR MONITOR
20
Frame Control Register-1
(Row 15, Column 01)
CP 1,CP 0
(Bit F,E)
This bit controls charge pump output current.
Frame Control Register-2
(Row 15, Column 02)
VP 7~VP 0
(Bit 7~0)
Vertical Start Position Control.
It means the top margin height from the V-sync reference edge.
( = VP[7:0]
×
2 )
HP 7~HP 0
(Bit F~8)
Horizontal Start Position Control.
It means the horizontal display delay from the H-sync reference
edge to the 1'st pixel position of characters. ( = HP[7:0]
×
6 )
Frame Control Register-3
(Row 15, Column 02)
STC 4
~STC 0
Window Start Column Position.
It means the column address that window starts from.
STR 3
~STR 0
Window Start Row Position.
It means the row address that window starts from.
RSI
Row Space Color Intensity.
RSR,RSG,
RSB
Row Space Color Attribute.
RS 2~RS 0
(Bit F~D)
Row Space.
It means the line number between a character row and the next row.
The defaut value is 0. (line number for spacing = RS[2:0]
×
1
)
Frame Control Registers-4
(Row 15, Column 04)
SPC 4~
STP 0
Window Stop Column Position.
It means the column address that window stops on.
STR 3~
STR 0
Window Stop Row Position.
It means the row address that window stops on.
VW 1, 0
Vertical width of window shadowing.
HW 1, 0
Horizontal width of window shadowing.
BW 1, 0
Width of window bordering.
PWM Registers
(Row 15, Column 05 - 08)
Bit 7~ 0
This 8-bit value decides the output duty cycle and waveforms of
PWM for channel.
Bit F~8
for channel 2/4/6/8.
Table 4. Register Description(Continued)
Registers
Bits
Description
CP 1
CP 0
Charge Pump Current
0
0
0.5mA
0
1
0.75mA
1
0
1.0mA
1
1
1.25mA
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