參數(shù)資料
型號(hào): KS57C3316
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: The KS57C3316 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrangeable
中文描述: 在KS57C3316單芯片CMOS微控制器是專門為高性能三星則采用最新的4位CPU核心,SAM47(三星Arrangeable
文件頁(yè)數(shù): 37/58頁(yè)
文件大小: 361K
代理商: KS57C3316
ELECTRICAL DATA
KS57C3316/P3316
17-10
Table 17-6. A.C. Electrical Characteristics (Concluded)
(T
A
= – 40
°
C to + 85
°
C, V
DD
= 1.8 V to 5.5 V)
Parameter
Symbol
t
CY
Conditions
Min
Typ
Max
Units
μ
s
Instruction cycle
time
(1)
V
DD
= 2.7 V to 5.5 V
0.67
64
V
DD
= 1.8 V to 5.5 V
1.3
64
With subsystem clock (fxt)
V
DD
= 2.7 V to 5.5 V
114
122
125
TCL0 input
frequency
f
TI
0
1.5
MHz
V
DD
= 1.8 V to 5.5 V
V
DD
= 2.7. V to 5.5 V
1
TCL0 input high,
low width
t
TIH
, t
TIL
0.48
μ
s
V
DD
= 1.8. V to 5.5 V
V
DD
= 2.7 V to 5.5 V
External
SCK
source
1.8
SCK
cycle time
t
KCY
800
ns
Internal SCK source
V
DD
= 1.8 V to 5.5 V
External
SCK
source
650
3200
Internal SCK source
V
DD
= 2.7 V to 5.5 V
External
SCK
source
3800
SCK
high, low
width
t
KH
, t
KL
400
Internal SCK source
t
KCY
/2- 50
V
DD
= 1.8 V to 5.5 V
External
SCK
source
1600
Internal
SCK
source
t
KCY
/2-150
SI setup time to
t
SIK
External
SCK
source
100
SCK
high
Internal
SCK
source
150
SI hold time to
t
KSI
External
SCK
source
400
SCK
high
Internal SCK source
V
DD
= 2.7 V to 5.5 V
External
SCK
source
400
Output delay for
SCK
to SO
t
KSO
300
Internal SCK source
V
DD
= 1.8 V to 5.5 V
External
SCK
source
250
1000
Internal
SCK
source
1000
NOTE:
Unless otherwise specified, Instruction Cycle Time condition values assume a main system clock/4 (fx/4) source.
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