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參數(shù)資料
| 型號(hào)： | KS57P3316 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | The KS57C3316 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrangeable |
| 中文描述： | 在KS57C3316單芯片CMOS微控制器是專門為高性能三星則采用最新的4位CPU核心，SAM47（三星Arrangeable |
| 文件頁(yè)數(shù)： | 8/58頁(yè) |
| 文件大小： | 361K |
| 代理商： | KS57P3316 |
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PRODUCT OVERVIEW
KS57C3316/P3316
1-8
Table 1-1. KS57C3316 Pin Descriptions (Concluded)
Pin Name
Pin
Type
I/O
I/O
Description
Number
Share
Pin
P0.0
P0.1
Reset
Value
Input
Input
Circuit
Type
D-2
D-2
BTCO
TCLO0
Basic timer overflow output signal
Timer/counter 0 clock output signal
72
73
TCL0
I/O
External clock input for timer/counter 0
74
P0.2
Input
D-4
BUZ
I/O
2,4,8 or 16 kHz frequency output for buzzer sound
for 4.19 MHz main system clock or 32.768 kHz
subsystem clock
75
P0.3
Input
D-2
INT0
INT1
I
External interrupt. The triggering edges
(rising/falling) are selectable. Only INT0 is
synchronized with system clock.
76
77
P1.0
P1.1
Input
A-4
INT2
INT4
I
I
Quasi-interrupt with detection of rising edge signal.
External interrupt input with detection of rising or
falling edges.
78
79
P1.2
P1.3
SCK
SI
SO
CLO
I/O
I/O
I/O
I/O
SIO interface clock signal
SIO interface data input signal
SIO interface data output signal
CPU clock output
80
1
2
3
P4.0
P4.2
P4.1
P4.3
Input
D-4
KS0-KS3
I/O
Quasi-interrupt input with falling edge detection
8-11
P6.0-
P6.3
P5.0-
P5.3
P7.0-
P7.3
P8-P13
Input
D-7
ADC0-
ADC3
SEG0-
SEG3
SEG4-
SEG27
I/O
ADC input ports.
4-7
Input
F-10
O
LCD segment signal output.
28-31
Output
H-28
O
LCD segment signal output.
32-55
Output
H-28
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| KS57C3316 | The KS57C3316 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrangeable |
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| KS57P4204 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:The KS57C4104/KS57C4204/KS57C4304 single-chip CMOS microcontroller has been designed for very high performance using Samsungs newest 4-bit CPU core, S |
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