參數(shù)資料
型號: KS57P5532
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 4-BIT CMOS Microcontroller(4位微控制器)
中文描述: 4位CMOS微控制器(4位微控制器)
文件頁數(shù): 7/9頁
文件大?。?/td> 61K
代理商: KS57P5532
KS57C5532/P5532 (Preliminary Spec)
PRODUCT OVERVIEW
1-7
Table 1-1. KS57C5532/P5532 Pin Descriptions (Continued)
Pin Name
P10.0–P10.3
Pin Type
I/O
Description
Number
19–16
(12–9)
23–20
(16–13)
27–24
(20–17)
Share Pin
P11.0–P11.3
Same as port 9.
Ports 10 and 11 can be paired to support 8-bit data
transfer.
P12.0–P12.3
I/O
4-bit I/O port.
1-bit or 4-bit read/write and test is possible.
Individual pins are software configurable as input or
output.
4-bit
pull-down
resistors are software assignable;
pull-down resistors are automatically disabled for
output pins.
3-bit I/O port; characteristics are same as port 9.
P13.0–P13.2
I/O
7–5
(64–62)
31 (24)
15 (8)
14 (7)
13 (6)
12 (5)
4, 3
(61, 60)
DTMF
O
I/O
I/O
I/O
I/O
I
DTMF output.
Serial I/O interface clock signal
Serial data output
Serial data input
Basic timer clock output
External interrupts. The triggering edge for INT0 and
INT1 is selectable. INT0 is synchronized to system
clock.
Quasi-interrupt with detection of rising edges
External interrupt with detection of rising and falling
edges.
Timer/counter 0 clock output
Timer/counter 1 clock output
Clock output
2 kHz, 4 kHz, 8 kHz, or 16 kHz frequency output at
the watch timer clock frequency of 32.768 kHz for
buzzer sound
External clock input for timer/counter 0
External clock input for timer/counter 1
Quasi-interrupt inputs with falling edge detection
P0.0
P0.1
P0.2
P0.3
SO
SI
BTCO
INT0, INT1
P1.0, P1.1
INT2
INT4
I
I
2 (59)
1 (58)
P1.2
P1.3
TCLO0
TCLO1
CLO
BUZ
I/O
I/O
I/O
I/O
11 (4)
10 (3)
9 (2)
8 (1)
P2.0
P2.1
P2.2
P2.3
TCL0
TCL1
KS0–KS3
I/O
I/O
I/O
34 (27)
33 (26)
51–48
(44–41)
55–52
(48–45)
P3.0
P3.1
KS4–KS7
P6.0–P6.3
P7.0–P7.3
NOTE
:
Parentheses indicate pin number for 64 QFP package.
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