參數(shù)資料
型號(hào)： KS8630D
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： ENHANCED CALLING LINE IDENTIFIER WITH CALL WAITING
中文描述： 增強(qiáng)電話線呼叫等待標(biāo)識(shí)符
文件頁(yè)數(shù)： 4/23頁(yè)
文件大?。?/td> 258K
代理商： KS8630D
KS8630D
ENHANCED CALLING LINE IDENTIFIER WITH CALL WAITING
4
PRELIMINARY
PIN DESCRIPTION
Pin No.
Pin Name
Type
Description
1
V
DD
P
Positive Power Supply.
2
AGC_VB
O
AGC block bias terminal. Usually a 0.47uF capacitor is connected between this
pin and V
REF
pin to reduce a dc offset produced by internal circuitry.
Inverting input of the on-chip input signal amplifier.
3
I
NN
I
NP
V
REF
RD
I
4
I
Non-inverting input of the on-chip input signal amplifier.
5
O
Reference Voltage. Typically 0.1 ~ 1uF is connected to GND.
6
I(S)
Schmitt trigger input to detect the ringing signal, ring-burst signal, Line-polarity
reversal signal.
7
RTB
I(S)/O
Open drain output/Schmitt trigger input.
An external resistor to V
DD
and a capacitor to V
SS
should be connected with
RTB to filter and to extend the RD input signal. Each components value is
related to the schmitt trigger input threshold and input signal frequency.
8
PD
I(S)
Power Down. Schmitt trigger & voltage sensing input.
If set to high level, all circuitry goes to power down mode except ring detection
& mode selection block. In order to satisfy the BT or Bellcore specification, it is
recommended to add a different application circuits.
All digital block can be resetted by this pin control. Whenever the u-controller
unmutes handset and enables keypad in Off-Hook state, KS8630D must
receive a reset pulse by this pin from microcontroller.
9
V
SS
DATA
P
Negative Power Supply.
10
B
Demodulated FSK data output. Default state is a logic high level.
DATA is tranmitted serially to the microcontroller ( 8bit /unit, LSB first ).
DCLK is used for sync clock of this DATA.
In case of using this pin as input, it is used for testing of KS8630D functionality.
11
MODE
B
Mode output signal to show the current status ( Ring / Dual Tone / FSK signal
receiving). Default state is a logic high level.
If detects a CAS tone, this MODE pin will be set to logic low level during a pre-
determined timming. If detects a Ring or FSK signal, this pin will be set to high
level. With the INTB pin, it can be informed current status to microcontroller.
In case of using this pin as input, it is used for testing of KS8630D functionality.
12
OFFHOOK
I
Hook Status Input. If set to high level, the operation condition of KS8630D go
to the Off-Hook state. If set to low level, it goes to the On-Hook state.
13
DCLK
B
Synchronous clock output of DATA. Default state is logic high level.
The right data is in falling edge of this clock. In case of using this pin as input,
it is used for testing of KS8630D functionality
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