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| 型號： | KS8695X |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 6/39頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH 10/100 5PORT 208PQFP |
| 標準包裝： | 24 |
| 類型： | 網(wǎng)關(guān) |
| 應(yīng)用： | 網(wǎng)絡(luò)和通信 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 208-MQFP，208-PQFP |
| 供應(yīng)商設(shè)備封裝： | 208-PQFP（28x28） |
| 包裝： | 托盤 |
| 配用： | KS8695-EVAL-ND - EVAL KIT EXPERIMENTAL KS8695 576-1005-ND - BOARD EVAL EXPERIMENT KS8695X |
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KS8695X
Micrel
M9999-102604
14
October 2004
Functional Description
Introduction
The CENTAUR KS8695X is a cost-effective, high-performance router-on-a-chip solution for Ethernet-based systems. It
integrates a powerful processor with a 5-port switch that consists of five MAC units, five physical layer transceivers (PHYs),
DMA engines, and hardware protocol engines for CPU offloading.
The KS8695X is built around the 16/32-bit ARM922T RISC processor. The ARM922T is a scalable, high-performance,
microprocessor developed for highly integrated system-on-a-chip applications. The KS8695X offers an 8KB I-cache and an
8KB D-cache to reduce memory access latency for high-performance applications. There are also SDRAM, SRAM, and ROM
interfaces with configurable bus speeds and data width. The KS8695X provides external I/O interfaces, a UART interface, a
general purpose I/O, a JTAG debugging port, an internal interrupt controller, and internal timers.
The KS8695X contains independent DMA engines for the WAN and LAN. Each of the independent DMA engines supports
burst mode as well as little-endian byte ordering for memory buffers and descriptors. Each DMA engine contains one 3KB
receive FIFO and one 3KB transmit FIFO to ensure back-to-back packet reception and no under-runs on packet transmission.
An integrated switch provides hardware support for some of the most desirable Layer 2 features such as port-based VLAN,
QoS/CoS packet prioritization, IGMP snooping, and Spanning Tree Protocol. The switch contains a 16Kx32 SRAM on-chip
memory for frame buffering. The embedded frame buffer memory is designed with a 1.4Gbps on-chip memory bus. This allows
the KS8695X to perform full non-blocking frame switching and/or routing.
There are five MAC units in the KS8695X: four are for LAN and one is for the WAN.
Connected to the LAN and WAN MACs are five 10/100 PHYs. These PHYs use Micrel’s patented low-power analog PHY
technology to achieve increased performance. The PHY units also support the auto MDI/MDI-X feature. The LAN PHYs
support 10BASE-T and 100BASE-TX operation as per the IEEE802.3 standard. The WAN PHY supports 10BASE-T,
100BASE-TX, and 100BASE-FX operation.
The KS8695X combines proven PHY, MAC, and switch technology with protocol and DMA engines, and the powerful
ARM922T processor to create a solution that saves BOM costs, board real-estate, and design time while providing outstanding
performance for a variety of router applications.
CPU Features
166MHz ARM922T RISC processor core
On-chip AMBA bus 2.0 interfaces
16-bit thumb programming to relax memory requirement
8KB I-cache and 8KB D-cache
Little-endian mode supported
Configurable memory management unit
Supports reduced CPU and system clock speed for power saving
Advanced Memory Controller Features
Supports glueless connection to two banks of ROM/SRAM/FLASH memory with programmable 8/16/32 bit data bus
and programmable access timing
Supports glueless connection to two SDRAM banks with programmable 8/16/32 bit data bus and programmable
RAS/CAS latency
Supports three external I/O banks with programmable 8/16/32 bit data bus and programmable access timing
Programmable system clock speed for power management
Direct Memory Access (DMA) Engines
Independent MAC DMA engine with programmable burst mode for WAN port
Independent MAC DMA engine with programmable burst mode for LAN ports
Supports little-endian byte ordering for memory buffers and descriptors
Contains large independent receive and transmit FIFOs (3KB receive/3KB transmit) for back-to-back packet receive,
and guaranteed no under-run packet transmit
Data alignment logic and scatter gather capability
XceleRouter Technology
Supports IPv4 IP header/TCP/UDP Packet checksum generation for host CPU offloading
Supports IPv4 packet filtering based on checksum errors
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KS8695X_11 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Integrated Multi-Port High-Performance Gateway Solution Rev. 1.03 |
| KS8695X-EVAL | 功能描述:BOARD EVAL EXPERIMENT KS8695X RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板 |
| KS86C4004 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:SAM87Ri family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-pr |
| KS86C4104 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:SAM87Ri family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-pr |
| KS86C4204 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:SAM87Ri family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-pr |
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