參數(shù)資料
型號: KS88C8316
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 8-Bit CMOS Microcontroller(8位 CMOS 微控制器)
中文描述: 8位CMOS微控制器(8位的CMOS微控制器)
文件頁數(shù): 6/7頁
文件大?。?/td> 65K
代理商: KS88C8316
PRODUCT OVERVIEW
KS88C8216/C8324/P8324/C8316/C8324/P8324 MICROCONTROLLERS
1–6
Table 1–1. KS88C8216/C8224 Pin Descriptions
Pin Name
Pin
Type
I/O
Pin Description
Circuit
Type
3
Pin
Numbers
2–9
Share
Pins
P0.0–P0.7
General I/O port (8-bit), configurable for
digital input or push-pull output.
General I/O port (2-bit), configurable for
digital input or n-channel open-drain output.
P1.0–P1.1 can withstand up to 6-volt loads.
Multiplexed for alternative use as external
interrupt inputs INT0–INT1.
General I/O port (4-bit), configurable for
digital input or n-channel open-drain output.
P1.0–P1.1 can withstand up to 6-volt loads.
High current port (10mA).
General I/O port (4-bit), configurable for
digital input or push-pull output.
General I/O port (6-bit). I/O mode or n-
channel open-drain, push-pull output mode
is software configurable. Pins can withstand
up to 5-volt loads.
P2.2: OTP SCLK, P2.3: OTP SDA
General I/O port (2-bit). I/O mode or n-
channel open-drain, push-pull output mode
is software configurable. Pins can withstand
up to 5-volt loads.
Each pin has an alternative function.
P2.5: PWM0 (14-bit PWM output)
P2.7: OSDHT (Halftone signal output)
General I/O port (2 bits), configurable for
digital input or n-channel open-drain output.
Multiplexed for alternative use as external
interrupt inputs ADC0–ADC1.
Output pin for 14-bit PWM0 circuit
Analog inputs for 4-bit A/D converter
External interrupt input pins
Halftone control signal output for OSD
Digital blue, green, red, and video blank
signal outputs for OSD
H-sync input for OSD
V-sync input for OSD
L-C oscillator pins for OSD clock frequency
generation
P1.0–P1.1
I/O
7
33–34
INT0–INT1
P1.2–P1.5
5
29–32
P1.6–P1.7
3
24, 28
P2.0–P2.4,
P2.6
I/O
2
14
17–21
P2.5, P2.7
2
1, 16
PWM0
OSDHT
P3.0–P3.1
I/O
6
22–23
ADC0
ADC1
PWM0
ADC0–ADC1
INT0–INT1
OSDHT
Vblue, Vgreen
Vred, Vblank
H-sync
V-sync
OSCIN,
OSCOUT
TEST
O
I
I
0
O
2
6
7
2
4
16
P2.5
22, 23
33, 34
1
37–40
P3.0–P3.1
P1.0–P1.1
P2.7
I
8
36
35
I, O
41, 42
I
Vdd
: Normal Operation Mode,
0V
: Test Mode and OTP Write Mode
System clock pins
System reset input pin, Factory test mode is
activated when 12V is applied
Power supply pins
27
XIN, XOUT
RESET
I, O
I
1
12, 13
15
VDD, VSS
10, 11, 25,
27
26
CAPA
I
Input for capture A module
8
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