參數(shù)資料
型號: KS8993ML
廠商: Micrel Inc
文件頁數(shù): 8/85頁
文件大?。?/td> 0K
描述: IC SWITCH 10/100 3PORT 128PQFP
標準包裝: 66
系列: *
類型: *
應用: *
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應商設(shè)備封裝: 128-PQFP(14x20)
包裝: 散裝
配用: 576-1016-ND - BOARD EVAL FOR KS8993ML
其它名稱: 576-1015
Micrel, Inc.
KS8993M/ML/MI
April 2005
16
M9999-041205
Pin Number
Pin Name
Type
(1)
Description
104
105
PV21
PV23
Ipu
Port 2 port-based VLAN mask bits – Use to select which
ports may transmit packets received on port 2.
PV21 = 1, port 1 may transmit packets received on port 2
PV21 = 0, port 1 will not transmit any packets received on
port 2
PV23 = 1, port 3 may transmit packets received on port 2
PV23 = 0, port 3 will not transmit any packets received on
port 2
106
DGND
Gnd
Digital ground
107
VDDIO
P
3.3V digital VDD
108
109
PV12
PV13
Ipu
Port 1 port-based VLAN mask bits – Use to select which
ports may transmit packets received on port 1.
PV12 = 1, port 2 may transmit packets received on port 1
PV12 = 0, port 2 will not transmit any packets received on
port 1
PV13 = 1, port 3 may transmit packets received on port 1
PV13 = 0, port 3 will not transmit any packets received on
port 1
110
P3_1PEN
Ipd
Enable 802.1p priority classification on port 3 ingress
1 = enable
0 = disable
Enable is from the receive perspective. If 802.1p processing
is disabled or there is no tag, priority is determined by the
P3_PP pin.
111
P2_1PEN
Ipd
Enable 802.1p priority classification on port 2 ingress
1 = enable
0 = disable
Enable is from the receive perspective. If 802.1p processing
is disabled or there is no tag, priority is determined by the
P2_PP pin.
112
P1_1PEN
Ipd
Enable 802.1p priority classification on port 1 ingress
1 = enable
0 = disable
Enable is from the receive perspective. If 802.1p processing
is disabled or there is no tag, priority is determined by the
P1_PP pin.
113
P3_TXQ2
Ipd
Select transmit queue split on port 3
1 = split
0 = no split
The split sets up high and low priority queues. Packet priority
classification is done on ingress ports, via port-based, 802.1p
or TOS based scheme. The priority enabled queuing on port 3
is set by P3_TXQ2.
Note:
1. P = Power supply.
Gnd = Ground.
Ipu = Input w/ internal pull-up.
Ipd = Input w/ internal pull-down.
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