參數(shù)資料
型號(hào): KSZ8031RNL
廠商: Micrel Inc
文件頁(yè)數(shù): 8/43頁(yè)
文件大小: 0K
描述: TXRX PHY 100BASE TX 3.3V 24QFN
標(biāo)準(zhǔn)包裝: 75
類型: PHY 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: RMII
電源電壓: 1.8V,2.5V,3.3V
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 24-QFN(4x4)
包裝: 管件
配用: 576-3862-ND - BOARD EVALUATION FOR KSZ8031RNL
其它名稱: 576-3741-5
Micrel, Inc.
KSZ8021RNL / KSZ8031RNL
August 2010
16
M9999-082710-1.0
So long as carrier detection criteria are met, CRS_DV remains asserted continuously from the first recovered dibit of the
frame through the final recovered dibit, and it is negated prior to the first REF_CLK that follows the final dibit. The data on
RXD[1:0] is considered valid once CRS_DV is asserted. However, since the assertion of CRS_DV is asynchronous
relative to REF_CLK, the data on RXD[1:0] is "00" until proper receive signal decoding takes place.
Receive Data [1:0] (RXD[1:0])
RXD[1:0] transitions synchronously with respect to REF_CLK. For each clock period in which CRS_DV is asserted,
RXD[1:0] transfers two bits of recovered data from the PHY.
RXD[1:0] is "00" to indicate idle when CRS_DV is de-asserted. Values other than “00” on RXD[1:0] while CRS_DV is de-
asserted are ignored by the MAC.
Receive Error (RXER)
RXER is asserted for one or more REF_CLK periods to indicate that a Symbol Error (e.g., a coding error that a PHY is
capable of detecting, and that may otherwise be undetectable by the MAC sub-layer) was detected somewhere in the
frame presently being transferred from the PHY.
RXER transitions synchronously with respect to REF_CLK. While CRS_DV is de-asserted, RXER has no effect on the
MAC.
Collision Detection
The MAC regenerates the COL signal of the MII from TXEN and CRS_DV.
RMII Signal Diagram – for KSZ8021/31RNL
The KSZ8021/31RNL RMII pin connections to the MAC are shown in the following figures for RMII – 25MHz Clock Mode
and RMII – 50MHz Clock Mode.
RMII – 25MHz Clock Mode
The KSZ8031RNL is configured to RMII – 25MHz Clock Mode after it is powered up or hardware reset with the following:
A 25MHz crystal connected to XI, XO (Pins 8, 7), or an external 25MHz clock source (oscillator) connected to XI
The KSZ8021RNL is configured optionally to RMII – 25MHz Clock Mode after it is powered up or hardware reset and
software programmed with the following:
A 25MHz crystal connected to XI, XO (pins 8, 7), or an external 25MHz clock source (oscillator) connected to XI
Register 1Fh, bit [7] programmed to ‘0’ to select RMII – 25MHz Clock Mode
Figure 2. KSZ8021/31RNL RMII Interface (RMII – 25MHz Clock Mode)
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KSZ8031RNL-EVAL 功能描述:以太網(wǎng)開(kāi)發(fā)工具 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ RMII Support (24-QFN) - Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
KSZ8031RNLI 功能描述:TXRX PHY 10/100 3.3V 24-QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器,接收器,收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,140 系列:AU 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類型:表面貼裝 封裝/外殼:14-SOIC(0.154",3.90mm 寬) 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 其它名稱:935267940512AU5790D14AU5790D14-ND
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KSZ8031RNLITR 制造商:Micrel Inc 功能描述:Ethernet transceiver,PHY,RMII,QFN24