參數(shù)資料
型號(hào)： KSZ9021GN
廠商： Micrel Inc
文件頁(yè)數(shù)： 14/53頁(yè)
文件大?。?/td> 0K
描述： TXRX ETHERNET GB GMII/MII 64-MLF
標(biāo)準(zhǔn)包裝： 348
類(lèi)型： 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 8/8
規(guī)程： 千兆位以太網(wǎng)
電源電壓： 3.135 V ~ 3.465 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 64-QFN（8x8）
包裝： 托盤(pán)
配用： 576-3873-ND - BOARD EVALUATION FOR KSZ9021GN
其它名稱(chēng)： 576-3635
KSZ9021GN-ND
Micrel, Inc.
KSZ9021GN
September 2010
21
M9999-091010-1.1
Auto-Negotiation Interval Timers
Time Duration
Transmit Burst interval
16 ms
Transmit Pulse interval
68 us
FLP detect minimum time
17.2 us
FLP detect maximum time
185 us
Receive minimum Burst interval
6.8 ms
Receive maximum Burst interval
112 ms
Data detect minimum interval
35.4 us
Data detect maximum interval
95 us
NLP test minimum interval
4.5 ms
NLP test maximum interval
30 ms
Link Loss time
52 ms
Break Link time
1480 ms
Parallel Detection wait time
830 ms
Link Enable wait time
1000 ms
Table 2. Auto-Negotiation Timers
GMII Interface
The Gigabit Media Independent Interface (GMII) is compliant to the IEEE 802.3 Specification. It provides a common
interface between GMII PHYs and MACs, and has the following key characteristics:
Pin count is 24 pins (11 pins for data transmission, 11 pins for data reception, and 2 pins for carrier and collision
indication).
1000Mbps is supported at both half and full duplex.
Data transmission and reception are independent and belong to separate signal groups.
Transmit data and receive data are each 8-bit wide, a byte.
In GMII operation, the GMII pins function as follow:
The MAC sources the transmit reference clock, GTX_CLK, at 125MHz for 1000Mbps.
The PHY recovers and sources the receive reference clock, RX_CLK, at 125MHz for 1000Mbps.
TX_EN, TXD[7:0] and TX_ER are sampled by the KSZ9021GN on the rising edge of GTX_CLK.
RX_DV, RXD[7:0], and RX_ER are sampled by the MAC on the rising edge of RX_CLK.
CRS and COL are driven by the KSZ9021GN and are not required to transition synchronously with respect to
either GTX_CLK or RX_CLK.
The KSZ9021GN combines GMII mode with MII mode to form GMII/MII mode to support data transfer at 10/100/1000
Mbps speed. After power-up or reset, the KSZ9021GN is configured to GMII/MII mode if the MODE[3:0] strap-in pins
are set to 0001. See Strapping Options section.
The KSZ9021GN has the option to output a low jitter 125MHz reference clock on CLK125_NDO (pin 55). This clock
provides a lower cost reference clock alternative for GMII/MII MACs that require a 125MHz crystal or oscillator. The
125MHz clock output is enabled after power-up or reset if the CLK125_EN strap-in pin is pulled high.
The KSZ9021GN provides a dedicated transmit clock input pin for GMII mode, defined as follow:
GTX_CLK (input, pin 32):
Sourced by MAC in GMII mode for 1000Mbps speed
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ9021GN TR 功能描述:以太網(wǎng) IC Gigabit Ethernet Transceiver with GMII/MII RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ9021GN-EVAL 功能描述:以太網(wǎng)開(kāi)發(fā)工具 Gigabit Ethernet Transceiver with GMII/MII - Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類(lèi)型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類(lèi)型:RMII 工作電源電壓:
KSZ9021GNI 功能描述:以太網(wǎng) IC Gigabit Ethernet Transceiver with GMII/MII, I-Temp RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ9021GQ 功能描述:以太網(wǎng) IC Gigabit Ethernet Transceiver with GMII/MII, Lead Free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ9021GQI 功能描述:以太網(wǎng) IC Gigabit Ethernet Transceiver w/ GMII/MII, I-Temp RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
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