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參數(shù)資料
| 型號： | KXPC823ZT81B2T |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC 81MHZ 256-PBGA |
| 標準包裝： | 2 |
| 系列： | MPC8xx |
| 處理器類型： | 32-位 MPC8xx PowerQUICC |
| 速度： | 81MHz |
| 電壓： | 1.8V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-BGA |
| 供應商設備封裝： | 256-PBGA（23x23） |
| 包裝： | 托盤 |
4
MPC823 Mobile Computing Microprocessor
MOTOROLA
Serial Interface with the Time-Slot Assigner
— Allows Serial Communication Controllers and Serial Management Controllers To Be
Used in Multiplexed and/or Nonmultiplexed Operation
— Supports T1, CEPT, PCM Highway, ISDN Basic Rate, ISDN Primary Rate,
User-Dened
— 1- or 8-Bit Resolution
— Allows Independent Transmit and Receive Routing, Frame Syncs, and Clocking
— Allows Dynamic Changes
— Can Be Internally Connected to Four Serial Channels
General-Purpose Timers
— Four 16-Bit Timers or Two 32-Bit Timers
— Gate Mode Can Enable/Disable Counting
— Interrupt Can Be Masked on Reference Match and Event Capture
Interrupts
— Seven External Interrupt Request (IRQ) Lines
— One Nonmaskable Interrupt
— Twelve Port Pins with Interrupt Capability
— Ten Internal Interrupt Sources
— Programmable Highest Priority Request
Memory Controller (Eight Banks)
— Can be Programmed to Support Almost any Memory Interface
— Each Bank Can Be a Chip-Select or RAS to Support a DRAM Bank
— A Maximum of 30 Wait States per Memory Bank Can Be Programmed
— Glueless Interface to DRAM Single In-Line Memory Modules, Static RAM,
Electrically Programmable Read-Only Memory, Flash EPROM, or Synchronous
DRAM
— Four CAS Lines, Four WE Lines, and One OE Line
— Boot Chip-Select Available at Reset (Options for 8-, 16-, or 32-Bit Memory)
— Variable Block Sizes—32K to 256M
— Selectable Write Protection
— On-Chip Bus Arbitration Supports External Bus Master
— Special Features for Burst Mode Support
System Integration Unit
— Hardware Bus Monitor
— Spurious Interrupt Monitor
— Software Watchdog Timer
— Periodic Interrupt Timer
— Low-Power Stop Mode
— Clock Synthesizer
— PowerPC Decrementer and Timebase
— Real-Time Clock
— Reset Controller
— IEEE 1149.1 Test Access Port (JTAG)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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