6-50
Channel Interface
If there are syntax errors during the header data, the Packet Error
Interrupt bit is set, INTRn is asserted if the interrupt is not masked, the
remainder of the packet after the error is skipped, and the Preparser
resynchronizes to the next start code.
If the ERRORn signal is asserted during the packet data, the Packet
Error Interrupt bit is set, INTRn is asserted if the interrupt is not masked,
and sequence error start codes (0x0000.01B4) are substituted for the
error lled data.
6.4.11.4 Transport MPEG-2 Video
Error Check Point: Start codes, zero packet length, and packet data
Description: If the ERRORn signal is asserted during the start code, the
whole packet is skipped and the Preparser resynchronizes to the next
start code.
If zero packet length is detected (transport mode is an exception), the
packet data until the next start code is stored. If the error occurs in the
start code search routine, the Packet Error Interrupt bit is set, INTRn is
asserted if not masked, error codes are injected, and then the Preparser
resynchronizes.
If the ERRORn signal is asserted during the packet data, the Packet
Error Interrupt bit is set, INTRn is asserted if the interrupt is not masked,
and sequence error start codes (0x0000.01B4) are substituted for the
error lled data.
6.5 Channel Buffer Controller
The Channel Buffer Controller manages the various buffers in the
external SDRAM. It reads and stores the start and end addresses of each
of the buffer areas. It maintains a write pointer for each buffer and a read
pointer for those that the internal microcontroller needs to access. It
updates the registers holding the read and write pointers. It also keeps
track of the number of 64-bit words in the Audio ES Channel Buffer and
the number of words or pictures in the Video ES Channel Buffer that have
not been read or decoded by the microcontroller and reports the numbers
to registers for access by the host. These functions are described in