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參數(shù)資料
| 型號： | L640DU12NI |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
| 中文描述： | 64兆位（4個M x 16位），3.0伏的CMOS只均勻部門閃存與VersatileIO⑩控制記憶 |
| 文件頁數(shù)： | 27/57頁 |
| 文件大?。?/td> | 885K |
| 代理商： | L640DU12NI |
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January22,2007 22366C6
Am29LV640D/Am29LV641D
25
D A T A S H E E T
Any commands written to the device during the Em-
bedded Program Algorithm are ignored.
Note that a
hardware reset
immediately terminates the program
operation. The program command sequence should
be reinitiated once the device returns to the read
mode, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries.
A bit cannot be programmed
from “0” back to a “1.”
Attempting to do so may
cause the device to set DQ5 = 1, or cause the DQ7
and DQ6 status bits to indicate the operation was suc-
cessful. However, a succeeding read shows that the
data is still “0.” Only erase operations can convert a “0”
to a “1.”
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to pro-
gram words to the device faster than using the stan-
dard program command sequence. The unlock bypass
command sequence is initiated by first writing two un-
lock cycles. This is followed by a third write cycle con-
taining the unlock bypass command, 20h. The device
then enters the unlock bypass mode. A two-cycle un-
lock bypass program command sequence is all that is
required to program in this mode. The first cycle in this
sequence contains the unlock bypass program com-
mand, A0h; the second cycle contains the program
address and data. Additional data is programmed in
the same manner. This mode dispenses with the initial
two unlock cycles required in the standard program
command sequence, resulting in faster total program-
ming time.
Table 10 on page 28
shows the require-
ments for the command sequence.
During the unlock bypass mode, only the Unlock By-
pass Program and Unlock Bypass Reset commands
are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset com-
mand sequence. The first cycle must contain the data
90h. The second cycle must contain the data 00h. The
device then returns to the read mode.
The device offers accelerated program operations
through the ACC pin. When the system asserts V
HH
on
the ACC pin, the device automatically enters the Un-
lock Bypass mode. The system may then write the
two-cycle Unlock Bypass program command se-
quence. The device uses the higher voltage on the
ACC pin to accelerate the operation.
Note that the
ACC pin must not be at V
HH
for operations other than
accelerated programming, or device damage may re-
sult.
Figure 3
illustrates the algorithm for the program oper-
ation. Refer to the
“Erase and Program Operations” on
page 39
table in the AC Characteristics section for pa-
rameters, and
Figure 15, on page 40
for timing dia-
grams.
Figure 3.
Program Operation
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase
command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional
unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase
algorithm. The device does
not
require the system to
preprogram prior to erase. The Embedded Erase algo-
rithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical
erase. The system is not required to provide any con-
trols or timings during these operations.
Table 10 on
page 28
shows the address and data requirements for
the chip erase command sequence.
START
Write Program
Command Sequence
Data Poll
from System
Verify Data
No
Yes
Last Address
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
Note:
See
Table 10 on page 28
, for program command
sequence.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L640DU12RF | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
| L640DU12RI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
| L640DU21NF | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
| L640DU21NI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
| L640DU21RF | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
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