參數(shù)資料
型號(hào): L640DU90RF
廠商: Advanced Micro Devices, Inc.
英文描述: 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control
中文描述: 64兆位(4個(gè)M x 16位),3.0伏的CMOS只均勻部門閃存與VersatileIO⑩控制記憶
文件頁數(shù): 32/57頁
文件大?。?/td> 885K
代理商: L640DU90RF
30
Am29LV640D/Am29LV641D
22366C6 January22,2007
D A T A S H E E T
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin
which indicates whether an Embedded Algorithm is in
progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command
sequence. Since RY/BY# is an open-drain output, sev-
eral RY/BY# pins can be tied together in parallel with a
pull-up resistor to V
CC
.
If the output is low (Busy), the device is actively eras-
ing or programming. (This includes programming in
the Erase Suspend mode.) If the output is high
(Ready), the device is in the read mode, the standby
mode, or the device is in the erase-suspend-read
mode.
Table 11 on page 32
shows the outputs for RY/BY#.
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded
Program or Erase algorithm is in progress or com-
plete, or whether the device has entered the Erase
Suspend mode. Toggle Bit I may be read at any ad-
dress, and is valid after the rising edge of the final
WE# pulse in the command sequence (prior to the
program or erase operation), and during the sector
erase time-out.
During an Embedded Program or Erase algorithm op-
eration, successive read cycles to any address cause
DQ6 to toggle. The system may use either OE# or
CE# to control the read cycles. When the operation is
complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors
selected for erasing are protected, DQ6 toggles for approxi-
mately 100 μs, then returns to reading array data. If not all
selected sectors are protected, the Embedded Erase algo-
rithm erases the unprotected sectors, and ignores the se-
lected sectors that are protected.
The system can use DQ6 and DQ2 together to determine
whether a sector is actively erasing or is erase-suspended.
When the device is actively erasing (that is, the Embedded
Erase algorithm is in progress), DQ6 toggles. When the de-
vice enters the Erase Suspend mode, DQ6 stops toggling.
However, the system must also use DQ2 to determine
which sectors are erasing or erase-suspended. Alterna-
tively, the system can use DQ7 (see the subsection
“DQ7:
Data# Polling” on page 29
).
If a program address falls within a protected sector,
DQ6 toggles for approximately 1
μ
s after the program
command sequence is written, then returns to reading
array data.
DQ6 also toggles during the erase-suspend-program
mode, and stops toggling once the Embedded Pro-
gram algorithm is complete.
Table 11 on page 32
shows the outputs for Toggle Bit I
on DQ6.
Figure 6, on page 30
shows the toggle bit al-
gorithm.
Figure 19, on page 43
in the “AC Characteris-
tics” section shows the toggle bit timing diagrams.
Figure 20, on page 43
shows the differences between
DQ2 and DQ6 in graphical form. See also the subsec-
tion
“DQ2: Toggle Bit II” on page 31
.
Figure 6.
Toggle Bit Algorithm
START
No
Yes
Yes
DQ5 = 1
No
Yes
Toggle Bit
= Toggle
No
Program/Erase
Operation Not
Complete, Write
Reset Command
Program/Erase
Operation Complete
Read DQ7–DQ0
Toggle Bit
= Toggle
Read DQ7–DQ0
Twice
Read DQ7–DQ0
Note:
The system should recheck the toggle bit even if
DQ5 = “1” because the toggle bit may stop toggling as DQ5
changes to “1.” See the subsections on DQ6 and DQ2 for
more information.
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