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參數(shù)資料
| 型號： | L6564D |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, PDSO10 |
| 封裝： | ROHS COMPLIANT, SSOP-10 |
| 文件頁數(shù)： | 16/34頁 |
| 文件大?。?/td> | 809K |
| 代理商： | L6564D |
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L6564
Application information
Doc ID 16202 Rev 1
23/34
where fL is the line frequency. The amount of 3rd harmonic distortion introduced by this
ripple, related to the amplitude of its 2fL component, will be:
shows a diagram that helps choose the time constant RFFCFF based on the
amount of maximum desired 3rd harmonic distortion. Always connect RFF and CFF to the
pin, the IC will not work properly if the pin is either left floating or connected directly to
ground.
Figure 36.
RFFCFF as a function of 3rd harmonic distortion introduced in the input
current
The dynamics of the voltage feedforward input, that is the output of the multiplier, is limited
downwards at 0.8 V (see Figure 35), so that cannot increase any more if the voltage on the
VFF pin is below 0.8 V. This helps to prevent excessive power flow when the line voltage is
lower than the minimum specified value.
6.4
THD optimizer circuit
The L6564 is provided with a special circuit that reduces the conduction dead-angle
occurring to the AC input current near the zero-crossings of the line voltage (crossover
distortion). In this way the THD (total harmonic distortion) of the current is considerably
reduced.
A major cause of this distortion is the inability of the system to transfer energy effectively
when the instantaneous line voltage is very low. This effect is magnified by the high-
frequency filter capacitor placed after the bridge rectifier, which retains some residual
voltage that causes the diodes of the bridge rectifier to be reverse-biased and the input
current flow to temporarily stop.
To overcome this issue the device forces the PFC pre-regulator to process more energy
near the line voltage zero-crossings as compared to that commanded by the control loop.
This will result in both minimizing the time interval where energy transfer is lacking and fully
discharging the high-frequency filter capacitor after the bridge.
shows the internal block diagram of the THD optimizer circuit.
FF
L
3
C
R
f
2
100
%
D
π
=
D %
3
0.1110
0.01
0.1
1
10
f = 50 Hz
L
f = 60 Hz
L
R C
[s]
FF
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| L6564DTR | 功能描述:功率因數(shù)校正 IC Transition Mode PFC 5mA 90uA 1.5% Ref RoHS:否 制造商:Fairchild Semiconductor 開關頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel |
| L6564H | 功能描述:功率因數(shù)校正 IC High Voltage Startup Trans-Mode PFC 700V RoHS:否 制造商:Fairchild Semiconductor 開關頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel |
| L6564HTR | 功能描述:功率因數(shù)校正 IC High Volt Start Up 700V PFC 100uA 6mA RoHS:否 制造商:Fairchild Semiconductor 開關頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel |
| L6564T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:10-pin transition-mode PFC controller |
| L6564TD | 功能描述:功率因數(shù)校正 IC 10-Pin Trans Mode PFC Bi 6mA 0.75W RoHS:否 制造商:Fairchild Semiconductor 開關頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel |
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