參數(shù)資料
型號(hào)： L6722TR
廠商： STMICROELECTRONICS
元件分類(lèi)： 穩(wěn)壓器
英文描述： SWITCHING CONTROLLER, 300 kHz SWITCHING FREQ-MAX, QCC36
封裝： 6 X 6 MM, 1 MM PITCH, VFQFPN-36
文件頁(yè)數(shù)： 10/34頁(yè)
文件大?。?/td> 421K
代理商： L6722TR
Obsolete
Product(s)
- Obsolete
Product(s)
7 Output voltage positioning
L6722
18/34
Figure 8.
Offset definition (margin mode)
●
No Offset (M1=1; M2=0)
●
Positive Margin (M1=0; M2=0)
●
Negative Margin (M1=0; M2=1)
Offset resistors may be simply defined as follow
where VTARGET-POS and VTARGET-NEG are the target voltages for positive and negative margin
mode.
Offset current is always sourced from REF_IN pin: to avoid having steps during soft-start, the
introduction of COS is required. The resulting time-constant need to be negligible with respect to
the soft-start time as well as long enough to smooth the initial step. Typical values are in the
range of few tens / hundreds of nF.
Offset function can be easily disabled by shorting REF_IN and REF_OUT together.
Warning:
Maximum offset must be limited to less than 200mV to avoid setting the OVP protection
resulting in a maximum +25% margin.
7.2
Droop function (optional)
This method "recovers" part of the drop due to the output capacitor ESR in the load transient,
introducing a dependence of the output voltage on the load current: a static error proportional to
the output current causes the output voltage to vary according to the sensed current.
Figure 9 shows the Current Sense Circuit used to implement the Droop Function. The current
flowing across the three inductors is read through the RPH - CPH filter across CS+ and CS- pins.
RD programs a transconductance gain and generates a current ICS proportional to the average
of the currents of the three phases. The current ICS is then mirrored and, multiplied by three,
sourced by the FB pin (IDROOP). RFB gives the final gain to program the desired load-line slope.
Ref
REF_IN
REF_OUT
I OS
ROS1
COS
ROS2
To Vout
(Remote Sense)
I DR
OOP
FB
COMP
VSEN
64k
FBR
FBG
64k
RF
CF
RFB
M1
R1
R2
M2
V
REFIN
Ref
I
OS
R
OS1
+
=
V
REFIN
Ref
I
OS
R
OS1
+
()
R
OS2
R
OS1
R
OS2
+
------------------------------------
=
R
OS1
V
TARGET
POS
–
Ref
–
I
OS
---------------------------------------------------------
=
R
OS2
R
OS1
V
TARGET
POS
–
V
TARGET
POS
–
V
TARGET
NEG
–
----------------------------------------------------------------------------------------
=
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