參數(shù)資料
型號: L9950XPTR
廠商: STMICROELECTRONICS
元件分類: 運(yùn)動控制電子
英文描述: BRUSH DC MOTOR CONTROLLER, 10 A, PDSO36
封裝: ROHS COMPLIANT, SSOP-36
文件頁數(shù): 24/39頁
文件大?。?/td> 620K
代理商: L9950XPTR
Functional description of the SPI
L9950 - L9950XP
Doc ID 10311 Rev 10
17
OUT6 OC
Recovery
Enable
After 50 ms the bit can be
cleared. If over-current
condition still exists, a wrong
load can be assumed.
OUT11 – HS
open load
The open load detection
monitors the load current
in each activated output
stage. If the load current
is below the open load
detection threshold for at
least 1 ms (tdOL) the
corresponding open load
bit is set. Due to
mechanical/electrical
inertia of typical loads a
short activation of the
outputs (e.g. 3 ms) can
be used to test the open
load status without
changing the
mechanical/electrical
state of the loads.
16
OUT5 OC
Recovery
Enable
OUT10 – HS
open load
15
OUT4 OC
Recovery
Enable
OUT9 – HS
open load
14
OUT3 OC
Recovery
Enable
OUT8 – HS
open load
13
OUT2 OC
Recovery
Enable
OUT7 – HS
open load
12
OUT1 OC
Recovery
Enable
OUT6 – HS
open load
11
OUT11 PWM1
Enable
If the PWM1/2 Enable Bit is set
and the output is enabled
(Input Register 0) the output is
switched on if PWM1/2 input is
high and switched off if
PWM1/2 input is low. OUT9
and OUT10 is controlled by
PWM2 input all other outputs
are controlled by PWM1 input.
OUT6 – LS
open load
The open load detection
monitors the load current
in each activated output
stage. If the load current
is below the open load
detection threshold for at
least 1 ms (tdOL) the
corresponding open load
bit is set. Due to
mechanical/electrical
inertia of typical loads a
short activation of the
outputs (e.g. 3 ms) can
be used to test the open
load status without
changing the
mechanical/electrical
state of the loads.
10
OUT10 PWM2
Enable
OUT5 – HS
open load
9
OUT9 PWM2
Enable
OUT5 – LS
open load
8
OUT8 PWM1
Enable
OUT4 – HS
open load
7
OUT7 PWM1
Enable
OUT4 – LS
open load
6
OUT6 PWM1
Enable
OUT3 – HS
open load
5
OUT4 PWM1
Enable
OUT3 – LS
open load
4
OUT4 PWM1
Enable
OUT2 –HS
open load
3
OUT3 PWM1
Enable
OUT2– LS
open load
2
OUT4 PWM1
Enable
OUT1 – HS
open load
1
OUT4 PWM1
Enable
OUT1 – LS
open load
0
1
No Error bit
A logical NOR
combination of all bits 1
to 22 in both status
registers.
Table 20.
SPI - input data and status registers 1 (continued)
Bit
Input register 1 (write)
Status register 1 (read)
Name
Comment
Name
Comment
相關(guān)PDF資料
PDF描述
L9950 BRUSH DC MOTOR CONTROLLER, 10 A, PDSO36
L9950TR BRUSH DC MOTOR CONTROLLER, 10 A, PDSO36
L9953XPTR BRUSH DC MOTOR CONTROLLER, 10 A, PDSO36
L9953TR BRUSH DC MOTOR CONTROLLER, 10 A, PDSO36
L9953 BRUSH DC MOTOR CONTROLLER, 10 A, PDSO36
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