LA7218M
PS No.5646-4/4
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the
performance, characteristics, and functions of the described products in the independent state, and are
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Set switch SW1 off only for f0 and VDL measurement. Set it on for all other measurements.
Switch SW2 has a neutral position, and is set to the "a" position for the VTH and VTL measurements, to the "b"
position for the IDH and IDL measurements, and to neutral for all other measurements.
Use a 1Vp-p standard color bar signal for the SG signal, use an attenuator for the VI min measurement, and use the
waveform shown below for the fCH and fCL measurements.
A square wave, such as that shown above, is used for the IDH and IDL measurement. It's frequency is 31.5kHz.
The fCH (and fCL) measurement is performed by setting the SG signal frequency high (or low) so that lock is lost and
lowering (raising) the frequency from those points and measuring the two frequencies at which the circuit locks. The
difference between these frequencies and f0 is fCH (and fCL).
The VTH (and VTL) measurement is performed by setting the pin 7 applied voltage V1 to 0V (or 5V) and raising (or
lowering) the voltage from those points and measuring the V1 voltages at the points pin 8 switches (inverts) from low
(high) to high (low). Those voltages are VTH and VTL, respectively.
IDH and IDL are calculated from the pin 7 waveform as shown in the figure below.
IDH =
1
10k
Ω
VIDH, IDL =
1
10k
Ω
VIDL
This catalog provides information as of November, 2006. Specifications and information herein are subject
to change without notice.
2.5V
VIDH
VIDL
4.7
μs
0.286V