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參數資料
| 型號： | LA73065VA |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 3 CHANNEL, VIDEO AMPLIFIER, PDSO24 |
| 封裝： | 0.225 INCH, SSOP-24 |
| 文件頁數： | 4/9頁 |
| 文件大?。?/td> | 107K |
| 代理商： | LA73065VA |
LA73065VA
No.A0887-4/9
Block Diagram
Please shorten the distance of the bold line to prevent oscillation.
Pin control table
Control voltage
SW No.
IN_Pin No.
OUT_Pin No.
SW function name
High (2.3V to VCC)
Open
Low (0 to 0.7V)
SW1
Pin1
Power_Save_CTL
Power_Save_OFF
Power_Save_ON
SW2
Pin5
Input_CTL
CLAMP_ON (RGB_Mode)
BIAS_ON (Component_Mode)
SW3
Pin8
Filter_CTL
12MHz_LPF_ON
30MHz_LPF_ON
SW4
Pin10
HD_MUTE_CTL
HD_MUTE_OFF
HD_MUTE_ON
D_L1
Pin2
Pin23
D_LINE1
High (4.0V to VCC)
Midd (1.8 to 2.4V)
Low (0 to 0.5V)
D_L2
Pin3
Pin22
D_LINE2
High (4.0V to VCC)
Low (0 to 0.5V)
D_L3
Pin4
Pin21
D_LINE3
High (4.0V to VCC)
Midd (1.8 to 2.4V)
Low (0 to 0.5V)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
5V/2.2V/0V
VREG_3V
5V/0V
5V/2.2V/0V
+
MUTE
Driver
12MHz
LPF
30MHz
LPF
BIAS
100k
Ω
CLAMP SW2
SW3
SW4
SW2
SW3
SW4
6dB
+
MUTE
Driver
12MHz
LPF
30MHz
LPF
CLAMP
SW3
SW4
6dB
+
MUTE
Driver
12MHz
LPF
30MHz
LPF
BIAS
100k
Ω
CLAMP
6dB
SW1:Power Save
CTL
D_LINE1_IN
(High/Open/Low)
D_LINE3_IN
(High/Open/Low)
SW2:Input CTL
(CLAMP or BIAS)
SW3:Firter CTL
(12MHz or 30MHz)
SW4:HD Mute CTL
GND_HD
VCC_HD
D_LINE3_OUT
GND_DR_HD
N.C.
VCC_DR_HD
Pr/R_IN
1
μF
+
1
μF
+
1
μF
Py/G_IN
Pb/B_IN
330
μF
75
Ω
75
Ω
75
Ω
75
Ω
1000
μF
75
Ω
75
Ω Pr/R_OUT
Py/G_OUT
Pb/B_OUT
330
μF
10k
Ω
D_LINE2_OUT
10k
Ω
D_LINE1_OUT
VREG_3V
10k
Ω
47
μF
REG3V
D_LINE2_IN
(High/Low)
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