LA7477W
No.5775-6/12
Serial Communications
Serial data
Parameter
Initial values
Bit 1
EVR CTL 1
L : 0, H : 1
0
Bit 2
EVR CTL 2
L : 0, H : 1
0
Bit 3
EVR CTL 3
L : 0, H : 1
0
Bit 4
EVR CTL 4
L : 0, H : 1
0
Bit 5
EVR CTL 5
L : 0, H : 1
0
Bit 6
Headphone and speaker
ON : 0, OFF : 1
1
Bit 7
EVR SERIAL
ON : 0, OFF : 1
1
Bit 8
12dB amplifier through state
OFF : 0, ON : 1
1
Bit 9
REC EVR SW
OFF : 0, ON : 1
0
Bit 10
DE-EMPH
OFF : 0, ON : 1
0
Bit 11
CONT1 OUT
L : 0, H : 1
1
Bit 12
CONT2 OUT
L : 0, H : 1
1
Bit 13
CONT3 OUT
L : 0, H : 1
1
Bit 14
CONT4 OUT
L : 0, H : 1
1
Bit 15
RFU SW
OFF : 0, ON : 1
0
Bit 16
STEREO/MAIN/SUB
STEREO : 0, MAIN : 0, SUB : 1
0
Bit 17
STEREO : 0, MAIN : 1, SUB : 0
0
Bit 18
ALC SW
ON : 0, OFF : 1
0
Bit 19
LINE OUT
ON : 0, OFF : 1
0
Bit 20
MIC/LINE1/LINE2/SPEAKER OFF
MIC : 0, LINE1 : 0, LINE2 : 1, SPEAKER OFF : 1
0
Bit 21
MIC : 0, LINE1 : 1, LINE2 : 0, SPEAKER OFF : 1
0
Bit 22
MUTE SW
OFF : 0, ON : 1
1
Bit 23
REC/PB/EE/POWER SAVE
REC : 0, PB : 0, EE : 1, POWER SAVE : 1
0
Bit 24
REC : 0, PB : 1, EE : 0, POWER SAVE : 1
0
Serial Transfer Timing
Maximum clock frequency
fMAX
800kHz
Clock pulse width (low)
tWL
625ns minimum
Clock pulse width (high)
tWH
625ns minimum
Chip enable setup time
tCS
625ns minimum
Chip enable hold time
tCH
625ns minimum
Data setup tim
tDS
625ns minimum
Data hold time
tDH
625ns minimum
Chip enable pulse width
tWC
625ns minimum
fMAX
tCS
tDS tDH
tWH tWL
tCH
MSB
LSB
tWC
CS
CLOCK
DATA