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參數(shù)資料
| 型號(hào)： | LA7945N |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP22 |
| 封裝： | SDIP-22 |
| 文件頁數(shù)： | 8/9頁 |
| 文件大小： | 150K |
| 代理商： | LA7945N |
LA7945N
No.4616–8/9
Pin 18 (DATA LPF) : The data slice LPF is connected to this pin.
A signal is output from pin 18 during the vertical retrace period CLK-RUN-
IN period, and an LPF, which is used to detect the average value of CLK-
RUN-IN (to be used as the slice level), is connected to this pin.
Figure 8 : Pin 18 (DATA LPF) Peripheral Circuit
Pin 19 (PEAK HOLD) : The synchronization separator peak hold capacitor is connected to this pin.
The IC holds the peak value of sync on pin 19, and performs synchronization
separation using 1/2 this level as the reference. This output is output from
pin 2.
Figure 9 : Pin 19 (PEAK HOLD) Peripheral Circuit
Pin 20 (V SEP R) : The resistor that determines the vertical synchronization separation is connected to this pin.
The LA7945N performs vertical synchronization separation by charging an
internal capacitor using the fixed current determined by the resistor con-
nected to this pin as the reference. The pin 20 DC voltage is 1/4 VCC.
Figure 10 : Pin 20 (V SEP R) Peripheral Circuit
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