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| 型號： | LA8385B-05CPT |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 233K |
| 代理商： | LA8385B-05CPT |
3A L
O W
D
R O P O U T
P
O S I T I V E
R
E G U L AT O R S
LX8385-xx/8385A-xx/8385B-xx
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
7
Copyright 1999
Rev. 2.0a 10/00
P
R O D U C T I O N
D
A T A
S
H E E T
A P P L I C AT I O N N O T E S
Example
Given: V
IN
= 5V
V
= 2.5V, I
= 1.5A
Ambient Temp., T
= 50°C
R
θ
JT
= 2.7°C/W for TO-220
Find: Proper Heat Sink to keep IC's junction
temperature below 125°C.**
Solution: The junction temperature is:
T
J
= P
D
(R
θ
JT
+ R
θ
CS
+ R
θ
SA
) + T
A
≡
Dissipated power.
R
θ
JT
≡
Thermal resistance from the junction to the
mounting tab of the package.
R
θ
CS
≡
Thermal resistance through the interface
between the IC and the surface on which
it is mounted. (1.0°C/W at 6 in-lbs
mounting screw torque.)
R
θ
SA
≡
Thermal resistance from the mounting surface
to ambient (thermal resistance of the heat sink).
T
S
≡
Heat sink temperature.
T
J
T
C
R
θ
JT
R
θ
CS
where: P
D
First, find the maximum allowable thermal resistance of the
heat sink:
T
J
- T
A
P
D
R
θ
SA
=
- (R
θ
JT
+ R
θ
CS
)
P
D
= (V
IN(MAX)
- V
OUT
) I
OUT
= (5.0V-2.5V) * 1.5A
= 3.75W
R
θ
SA
=
- (2.7°C/W
+ 1.0°C/W)
= 16.3°C/W
Next, select a suitable heat sink. The selected heat sink must have
R
θ
SA
≤
16.3°C/W. Thermalloy heatsink 6230B has R
= 12.0°C/W.
Finally, verify that junction temperature remains within speci-
fication using the selected heat sink:
T
J
= 3.75W (2.7°C/W + 1.0°C/W + 12.0°C/W) + 50°C = 109°C
T
S
T
A
R
θ
SA
125°C - 50°C
3.75W
**
Although the device can operate up to 150°C junction, it is recom-
mended for long term reliability to keep the junction temperature
below 125°C whenever possible.
LOAD REGULATION
(continued)
Even when the circuit is optimally configured, parasitic resistance
can be a significant source of error. A 20 mil wide PC trace built from
1 oz. copper-clad circuit board material has a parasitic resistance of
about 25 milliohms per inch of its length at room temperature. If
a 3-terminal regulator used to supply 2.50 volts is connected by 2
inches of this trace to a load which draws 1.5 amps of current, a
75 millivolt drop will appear between the regulator and the load.
Even when the regulator output voltage is precisely 2.50 volts, the
load will only see 2.43 volts, which is a 3% error. It is important to
keep the connection between the regulator output pin and the load
as short as possible, and to use wide traces or heavy-gauge wire.
The minimum specified output capacitance for the regulator
should be located near the reglator package. If several capacitors
are used in parallel to construct the power system output capaci-
tance, any capacitors beyond the minimum needed to meet the
specified requirements of the regulator should be located near the
sections of the load that require rapidly-changing amounts of
current. Placing capacitors near the sources of load transients will
help ensure that power system transient response is not impaired
by the effects of trace impedance.
To maintain good load regulation, wide traces should be used on
the input side of the regulator, especially between the input
capacitors and the regulator. Input capacitor ESR must be small
enough that the voltage at the input pin does not drop below V
IN (MIN)
during transients.
V
IN (MIN)
= V
OUT
+ V
DROPOUT (MAX)
where: V
IN (MIN)
≡
the lowest allowable instantaneous
voltage at the input pin.
≡
the designed output voltage for the
power supply system.
V
DROPOUT (MAX)
≡
the specified dropout voltage
for the installed regulator.
V
OUT
THERMAL CONSIDERATIONS
The LX8385
/85A/85B
regulators have internal power and thermal
limiting circuitry designed to protect each device under overload
conditions. For continuous normal load conditions, however,
maximum junction temperature ratings must not be exceeded. It is
important to give careful consideration to all sources of thermal
resistance from junction to ambient. This includes junction to case,
case to heat sink interface, and heat sink thermal resistance itself.
Junction-to-case thermal resistance is specified from the IC
junction to the back surface of the case directly opposite the die.
This is the lowest resistance path for heat flow. Proper mounting
is required to ensure the best possible thermal flow from this area
of the package to the heat sink. Thermal compound at the case-to-
heat-sink interface is strongly recommended. If the case of the
device must be electrically isolated, a thermally conductive spacer
can be used, as long as its added contribution to thermal resistance
is considered. Note that the case of all devices in this series is
electrically connected to the output.
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