參數(shù)資料
型號： LB11889M
元件分類： 運動控制電子
英文描述： BRUSHLESS DC MOTOR CONTROLLER, 1.3 A, PDSO36
封裝： 0.375 INCH, MFP-36
文件頁數(shù)： 4/11頁
文件大?。?/td> 90K
代理商： LB11889M
LB11889M
No.8791-2/11
Electrical Characteristics at Ta = 25
°C, VCC = 5V, VS = 15V
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
VCC power supply current
ICC
RL = ∞, VCTL = 0V, VLIM = 0V (at static mode)
12
18
mA
Output
VOsat1
IO = 500mA, Rf = 0.5, sink+source
VCTL = VLIM = 5V (With saturation prevention)
2.1
2.6
Output saturation voltage
VOsat2
IO = 1.0A, Rf = 0.5, sink+source
VCTL = VLIM = 5V (With saturation prevention)
2.6
3.5
V
Output leak current
IOleak
1.0
mA
FR
FR pin input threshold voltage
VFSR
2.25
2.50
2.75
V
FR pin input input bias current
Ib (FSR)
-5.0
A
Control
CTLREF pin voltage
VCREF
2.37
2.50
2.63
V
CTLREF pin input range
VCREF IN
1.70
3.50
V
CTL pin input bias current
Ib (CTL)
VCTL = 5V, CTLREF : OPEN
8.0
A
CTL pin control start voltage
VCTL (ST)
Rf = 0.5
, VLIM = 5V, IO≥10mA
With hall input logic fixed (U, V, W = H, H, L)
2.20
2.35
2.50
V
CTL pin control switching voltage
VCTL (ST2)
Rf = 0.5
, VLIM = 5V
3.00
3.15
3.30
V
CTL pin control Gm1
Gm1 (CTL)
Rf = 0.5
, IO = 200mA
With hall input logic fixed (U, V, W = H, H, L)
0.52
0.65
0.78
A/V
CTL pin control Gm2
Gm2 (CTL)
Rf = 0.5
, VCTL = 200mV
With hall input logic fixed (U, V, W = H, H, L)
1.20
1.50
1.80
A/V
Current limiter
LIM current limiter offset voltage
Voff (LIM)
Rf = 0.5
, VCTL = 5V, IO≥10mA
With hall input logic fixed (U, V, W = H, H, L)
140
200
260
mV
LIM pin input bias current
Ib (LIM)
VCTL = 5V, CTLREF : OPEN, VLIM = 0V
-2.5
A
LIM pin current limiter level
Ilim
Rf = 0.5
, VCTL = 5V, VLIM = 2.06V
With hall input logic fixed (U, V, W = H, H, L)
830
900
970
mA
Hall amplifier
Hall amplifier input offset voltage
Voff (HALL)
-6
+6
mV
Hall amplifier input bias current
Ib (HALL)
1.0
3.0
A
Hall amplifier common-mode
VCM (HALL)
1.3
3.3
V
TRC
Torque ripple correction factor
TRC
At bottom and peak of Rf waveform at IO = 200mA
(RF = 0.5
, ADJ-OPEN) Note 2
9
%
ADJ pin voltage
VADJ
2.37
2.50
2.63
V
FG amplifier
FG amplifier input offset voltage
Voff (FG)
-8
+8
mV
FG amplifier input bias current
Ib (FG)
-100
nA
FG amplifier output saturation
voltage
VOsat (FG)
At internal pull-up resistor on the sink side
0.5
V
FG amplifier common-mode input
voltage
VCM (FG)
0.5
4.0
V
Saturation
Saturation prevention circuit lower
set voltage
VOsat
(DET)
Voltage between each OUT and Rf at IO = 10mA,
Rf = 0.5
, VCTL = VLIM = 5V
0.175
0.25
0.325
V
TSD
TSD operating temperature
T-TSD
(Design target) Note.1
180
°C
TSD temperature hysteresis width
TSD
(Design target) Note.1
20
°C
Note 1. No measurements are made on the parameters with Note (Design target).
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