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參數(shù)資料
| 型號： | LB11980H |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 1.3 A, PDSO28 |
| 封裝： | 0.375 INCH, HSOP-28 |
| 文件頁數(shù)： | 4/11頁 |
| 文件大?。?/td> | 103K |
| 代理商： | LB11980H |
LB11980H
No.8798-2/11
Electrical Characteristics at Ta = 25
°C, VCC = 5V, VS = 15V
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
VCC supply current
ICC
RL = ∞, VCTL = 0, VLIM = 0V (Quiescent)
12
18
mA
Output
VOsat1
IO = 500mA, Rf = 0.5, sink+source
VCTL = VLIM = 5V (With saturation prevention)
2.1
2.6
V
Output saturation voltage
VOsat2
IO = 1.0A, Rf = 0.5, sink+source
VCTL = VLIM = 5V (With saturation prevention)
2.6
3.5
V
Output leakage current
IOleak
1.0
mA
FR
FR pin input threshold voltage
VFSR
1.0
1.25
2
V
FR pin input input bias current
Ib (FSR)
VFR = 3V
100
150
200
A
Control
CTL pin input Input bias current
Ib (CTL)
VCTL = 5V
1.5
3
A
CTL pin input motor current
Imctl
VCTL = 0V
5
mA
CTL pin control start voltage
VCTL (ST)
Rf = 0.5
, VLIM = 5V, IO ≥ 10mA
Hall input logic fixed (U, V, W = H, H, L)
2.25
2.50
2.75
V
CTL pin control Gm
Gm (CTL)
Rf = 0.5
, IO = 200mA
Hall input logic fixed (U, V, W = H, H, L)
0.86
1.06
1.26
A/V
Current limit
LIM pin input current
Ilim
VLIM = 3V
1.5
3
A
LIM pin motor current
Imlim
VLIM = 0V
5
mA
LIM current limit offset voltage
Voff (LIM)
Rf = 0.5
, VCTL = 5V, IO ≥ 10mA
Hall input logic fixed (U, V, W = H, H, L)
1.0
1.25
1.5
V
LIM pin control Gm
Gm (lim)
Rf = 0.5
, VCTL = 5V
Hall input logic fixed (U, V, W = H, H, L)
0.59
0.71
0.83
A/V
Hall amplifier
Hall amplifier input offset voltage
VOFF
(HALL)
-6
+6
mV
Hall amplifier input bias current
Ib (HALL)
1.0
3.0
A
Hall amplifier common-mode
input voltage
VCM (HALL)
1.3
3.3
V
TRC
Torque ripple correction ratio
TRC
For the high and low peaks in the Rf waveform when
IO = 200mA
(Rf = 0.5
, ADJ-OPEN) Note.2
13
%
ADJ pin voltage
VADJ
2.37
2.50
2.63
V
FG Amplifier
FG amplifier input offset voltage
VOFF (FG)
-8
+8
mV
FG amplifier input bias current
Ib (FG)
-100
nA
FG amplifier output saturation
voltage
VOsat (FG)
Sink side; With internal pull-up resistance load
0.5
0.6
V
FG amplifier voltage gain
VG (FG)
For open loop at f = 10kHz
41.5
44.5
47.5
dB
FG amplifier common-mode input
voltage
VCM (FG)
0.5
4.0
V
Schmitt amplifier
Duty ratio
DUTY
Under specified conditions (RF = 39k
) Note 3
49.0
50
51.0
%
Upper side output saturation voltage
Vsatu (SH)
IO = -20A
4.8
V
Lower side output saturation voltage
Vsatd (SH)
IO = 100A
0.2
V
Hysteresis width
Vhys
32
46
60
mV
FGS output pin pull-up resistance
RFGout
4.7
k
Saturation
Saturation prevention circuit
lower set voltage
VO sat
(DET)
Voltage between each OUT and Rf with
IO = 10mA, Rf = 0.5, VCTL = VLIM = 5V
0.175
0.25
0.325
V
TSD
TSD operating temperature
T-TSD
(Design target) Note.1
180
°C
Note 1. No measurements are made on the parameters with Note (Design target).
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