• 參數(shù)資料
    型號(hào): LB1927
    廠商: SANYO SEMICONDUCTOR CO LTD
    元件分類: 運(yùn)動(dòng)控制電子
    英文描述: BRUSHLESS DC MOTOR CONTROLLER, 2.5 A, PDIP28
    封裝: HEAT SINK, DIP-28
    文件頁數(shù): 11/11頁
    文件大?。?/td> 269K
    代理商: LB1927
    LB1927
    No.6197-9/11
    Description of the LB1927
    1. Speed control circuit
    The IC performs speed control through combined use of a speed discrimination circuit and PLL circuit. The speed
    control circuit counts FG cycles and outputs a deviation signal every 2FG cycles. The PLL circuit outputs a phase
    deviation signal every FG cycle.
    The FG servo frequency is determined by the following equation. The motor rotation speed is set by the number of
    FG pulses and the crystal oscillator frequency.
    fFG (servo) = fOSC/8192
    fOSC : Crystal oscillator frequency
    2. Output drive circuit
    In order to reduce power loss at the output, the LB1927 uses the PWM drive technique. While ON, the output
    transistors are always saturated, and motor drive power is adjusted by varying the output ON duty ratio. Because
    output PWM switching is performed by the lower-side output transistor, a Schottky diode must be connected
    between OUT and VCC. (If the reverse recovery time of the diode is too long, a feedthrough current will flow at the
    instant when the lower-side transistor goes ON.) An internal diode is provided between OUT and GND. If large
    output current causes a problem (waveform distortion during lower-side kickback, etc.), an external rectifying diode
    or Schottky diode should be connected.
    The output diode is integrated only on the lower side.
    3. Current limiting circuit
    The current limiting circuit limits the peak current to the value I = VRF/Rf (VRF = 0.5V typ., Rf : current detector
    resistance). Current limiting is achieved by reducing the ON duty ratio of the output, which reduces the current.
    4. Power save circuit
    In order to reduce current drain in the STOP condition, the IC goes into power save mode. In this condition, bias
    current to most circuits is cut off, but the 5V regulator output remains active.
    5. Reference clock
    The reference clock for speed control can be input using one of the following two methods.
    (1) Using a crystal oscillator
    When a crystal is used for oscillation, connect the crystal, capacitors, and a resistor as shown in the figure below.
    R1
    C1
    VREG
    XI
    XO
    C2
    C3
    C4
    (Reference values)
    Oscillator frequency (MHz)
    C1 (
    F)
    C2 (pF)
    C3 (pF)
    C4 (pF)
    R1 (
    )
    3 to 5
    0.1
    15
    47
    10
    330k
    5 to 8
    0.1
    10
    47
    None
    330k
    8 to 10
    0.1
    10
    22
    None
    330k
    The circuit configuration and values are for reference only. The crystal oscillator’s characteristics as well as the
    possibility of floating capacitance and noise due to layout factors must be taken into consideration when
    designing an actual application.
    C1, R1 : For stable oscillation
    C3 : For oscillator coupling
    C2 : For stabilization and to prevent oscillation at upper harmonic frequencies
    C4 : Prevents oscillation at upper harmonic frequencies
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