參數(shù)資料
型號(hào): LC35256D
廠商: Sanyo Electric Co.,Ltd.
英文描述: 256K asynchronous silicon gate CMOS static RAM(256K異步硅門(mén)CMOS靜態(tài)RAM)
中文描述: 256K異步硅柵CMOS靜態(tài)RAM(256K異步硅門(mén)的CMOS靜態(tài)RAM)的
文件頁(yè)數(shù): 8/8頁(yè)
文件大?。?/td> 107K
代理商: LC35256D
PS No. 5823-8/8
LC35256D-10, LC35256DM, DT-70/10
Notes on Circuit Design
Take the following operations into account when designing circuits that use these products to assure that none of the
items in the maximum ratings are exceeded.
Supply voltage variations and fluctuations
Manufacturing variations in the electrical characteristics of the electrical components, including semiconductor
devices, resistors, and capacitors.
Ambient temperature
Variations and fluctuations in the input and clock signals
Possible application of abnormal pulses
Parameters listed in the allowable operating ranges must never exceed their stipulated ranges.
If input pins to a CMOS IC are left open, through currents may occur in internal circuits to which intermediate potentials
are input and result in incorrect circuit operation. Always verify that any unused pins are set up in appropriate states.
This catalog provides information as of May, 1998. Specifications and information herein are subject to change
without notice.
I
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace
equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of
which may directly or indirectly cause injury, death or property loss.
I
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and
distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all
damages, cost and expenses associated with such use:
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on
SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees
jointly or severally.
I
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for
volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied
regarding its use or any infringements of intellectual property rights or other rights of third parties.
Notes: 1. Reference value at Ta = 25°C, V
CC
= 3 V.
2. t
RC
: Read cycle time
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
*
1
max
Data retention supply voltage
V
DR
V
CE
V
CC
– 0.2 V
2.0
5.5
V
V
CC
= 3.0 V,
V
CE
V
CC
– 0.2 V
Ta
25°C
Ta
60°C
Ta
85°C
0.01
μA
Data retention current drain
I
CCDR
0.7
μA
3.5
μA
Chip enable setup time
t
CDR
t
R
0
ns
Chip enable hold time
t
RC
*
2
ns
Data Retention Characteristics at
Ta = –40 to +85°C
Data Retention Waveforms
Note
*
: V
CCL
5-V operation: 4.5 V
3-V operation: 2.7 V
Data retention mode
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LC35256D-10 制造商:SANYO 制造商全稱(chēng):Sanyo Semicon Device 功能描述:Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAM
LC35256DM 制造商:SANYO 制造商全稱(chēng):Sanyo Semicon Device 功能描述:Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAM
LC35256DM-10 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:
LC35256DM-70 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x8 SRAM
LC35256DT 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述: