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參數(shù)資料
| 型號(hào)： | LC3564RT-12LV |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 64K (8192 words x 8 bits) SRAM |
| 中文描述： | 64K的（8192字× 8位）的SRAM |
| 文件頁(yè)數(shù)： | 10/10頁(yè) |
| 文件大?。?/td> | 442K |
| 代理商： | LC3564RT-12LV |
LC3564RM,RT-10LV/12LV/15LV
No. 4484—10/10
I
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear
power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury,
death or property loss.
I
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their
officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated
with such use:
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO.,
LTD., its affiliates, subsidiaries and distributors or any of their officers and employees, jointly or severally.
I
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO
believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of
intellectual property rights or other rights of third parties.
This catalog provides information as of June, 1997. Specifications and information herein are subject to change without notice.
Data Retention Characteristics
at Ta = –40 to +85
°
C
3V Operation
Note: t
RC
is the read cycle time.
Data Retention Waveform 1 (CE1 control)
Parameter
Symbol
Conditions
Ratings
Unit
min.
typ.
max.
Data retention supply voltage
V
DR
V
CE1
≥
V
CC
– 0.2V,
V
CE2
≥
V
CC
– 0.2V or
V
CE2
≤
0.2V
2.0
-
3.6
V
Chip enable setup time
t
CDR
0
-
-
ns
Chip enable hold time
t
R
t
RC
-
-
ns
Battery Operation
Parameter
Symbol
Conditions
Ratings
Unit
min.
typ.
max.
Data retention supply voltage
V
DR
V
CE1
≥
V
CC
– 0.2V,
V
CE2
≥
V
CC
– 0.2V or
V
CE2
≤
0.2V
2.0
-
3.6
V
Data Retention Waveform 2 (CE2 control)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC3564RT-15LV | 64K (8192 words x 8 bits) SRAM |
| LC3564RM-12LV | |
| LC3564RM | ECONOLINE: RSZ/P - 1kVDC |
| LC3564ST-10 | 64K (8192 words x 8 bits) SRAM |
| LC3564ST-70 | 64K (8192 words x 8 bits) SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC3564RT-15LV | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:64K (8192 words x 8 bits) SRAM |
| LC3564S | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:64K (8192 words x 8 bits) SRAM |
| LC3564S_SERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC3564S-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC3564S-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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