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Lattice Semiconductor
ispMACH 4000V/B/C/Z Family Data Sheet
41
Switching Test Conditions
Figure 12 shows the output test load that is used for AC testing. The speci
fi
c values for resistance, capacitance,
voltage, and other test conditions are shown in Table 11.
Figure 12. Output Test Load, LVTTL and LVCMOS Standards
Table 11. Test Fixture Required Components
Test Condition
R
1
R
2
C
L
1
Timing Ref.
V
CCO
LVCMOS I/O, (L -> H, H -> L)
106
106
35pF
LVCMOS 3.3 = 1.5V
LVCMOS 3.3 = 3.0V
LVCMOS 2.5 = V
CCO
/2
LVCMOS 1.8 = V
CCO
/2
1.5V
LVCMOS 2.5 = 2.3V
LVCMOS 1.8 = 1.65V
LVCMOS I/O (Z -> H)
∞
106
35pF
3.0V
LVCMOS I/O (Z -> L)
106
∞
35pF
1.5V
3.0V
LVCMOS I/O (H -> Z)
∞
106
5pF
V
OH
- 0.3
V
OL
+ 0.3
3.0V
LVCMOS I/O (L -> Z)
106
∞
5pF
3.0V
1. C
L
includes test
fi
xtures and probe capacitance.
V
CCO
R1
R2
CL
DUT
Test
Point
0213A/ispm4k