tS D-Register Setup Time, G" />
參數(shù)資料
型號: LC5256MB-4F256C
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 31/99頁
文件大小: 0K
描述: IC XPLD 256MC 4NS 256FPBGA
標準包裝: 90
系列: ispXPLD® 5000MB
可編程類型: 系統(tǒng)內可編程
最大延遲時間 tpd(1): 4.0ns
電壓電源 - 內部: 2.3 V ~ 2.7 V
邏輯元件/邏輯塊數(shù)目: 8
宏單元數(shù): 256
輸入/輸出數(shù): 141
工作溫度: 0°C ~ 90°C
安裝類型: 表面貼裝
封裝/外殼: 256-BGA
供應商設備封裝: 256-FPBGA(17x17)
包裝: 托盤
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
33
Registered Delays
tS
D-Register Setup
Time, Global Clock
0.28
0.31
0.35
0.55
0.52
ns
tS_PT
D-Register Setup
Time, PT Clock
-0.13
-0.11
-0.10
-0.10
-0.07
ns
tH
D-Register Hold
Time
1.90
2.56
2.50
2.40
4.00
ns
tCOi
Register Clock to
OSA Time
0.72
1.03
0.68
0.93
1.50
ns
tCESi
Clock Enable Setup
Time
1.07
1.20
1.33
1.33
2.00
ns
tCEHi
Clock Enable Hold
Time
0.00
0.00
0.00
0.00
0.00
ns
tSIR
D-Input Register
Setup Time, Global
Clock
0.66
0.20
0.53
0.12
0.08
ns
tSIR_PT
D-Input Register
Setup Time, PT
Clock
0.42
0.37
0.34
0.34
0.22
ns
tHIR
D-Input Register
Hold Time, Global
Clock
0.84
1.31
1.01
1.41
2.91
ns
tHIR_PT
D-Input Register
Hold Time, PT
Clock
0.00
0.00
0.00
0.00
0.00
ns
Latched Delays
tSL
Latch Setup Time,
Global Clock
0.18
0.00
0.00
0.00
0.00
ns
tSL_PT
Latch Setup Time,
PT Clock
0.18
0.00
0.00
0.00
0.34
ns
tHL
Latch Hold Time
-0.06
0.00
0.00
0.00
-0.03
ns
tGOi
Latch Gate to OSA
Time
0.07
0.08
0.08
0.08
0.13
ns
tPDLi
Propagation Delay
through Latch to
OSA Transparent
0.52
0.58
0.65
0.65
0.97
ns
Reset and Set Delays
tSRi
Asynchronous
Reset or Set to OSA
Delay
0.23
0.26
0.29
0.29
0.43
ns
tSRR
Asynchronous
Reset or Set
Recovery
0.42
0.47
0.53
0.55
0.79
ns
eXtended Function Routing Delays
tROUTEMF
Delay through SRP
when Implementing
Memory Functions
2.00
2.25
2.51
2.61
3.76
ns
ispXPLD 5000MX Family Internal Switching Characteristics (Continued)
Over Recommended Operating Conditions
Parameter
Description
Base
Parameter
-4
-45
-5
-52
-75
Units
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
SELECT
DEVICES
DISCONTINUED
相關PDF資料
PDF描述
HBC65DRTH-S734 CONN EDGECARD 130PS DIP .100 SLD
F950J226MRAAQ2 CAP TANT 22UF 6.3V 20% 0805
MIC29310-3.3BT IC REG LDO 3.3V 3A TO-220-3
GEC06DRYN CONN EDGECARD 12POS DIP .100 SLD
TOP252PN IC OFFLINE SWIT PROG OVP 8DIP
相關代理商/技術參數(shù)
參數(shù)描述
LC5256MB-4F256I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5256MB-4F484C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5256MB-4F484I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5256MB-4F672C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5256MB-4F672I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family