
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The 'LVC541A devices are ideal for driving bus lines or buffering memory address registers.
OE1
OE2
To Seven Other Channels
A1
Y1
1
19
2
18
SN54LVC541A, SN74LVC541A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCAS298M–JANUARY 1993–REVISED MAY 2005
These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board
layout.
The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output enable (OE1 or OE2)
input is high, all eight outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
These devices are fully specified for partial-power-down applications using I
. The I
circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
INPUTS
OE2
L
L
X
H
OUTPUT
Y
OE1
L
L
H
X
A
L
H
X
X
L
H
Z
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
2