參數(shù)資料
型號: LC5768MC-5F256C
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
中文描述: EE PLD, 6 ns, PBGA256
封裝: FPBGA-256
文件頁數(shù): 46/92頁
文件大?。?/td> 378K
代理商: LC5768MC-5F256C
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
46
Power Consumption
Power Estimation Coef
fi
cients
Memory Coef
fi
cients
K0 = Current per MFB input (μA/MHz)
K1 = Current per Product Term (μA/MHz)
K2 = Current per GRP from MFB (μA/MHz)
K3 = Current per GRP from I/O (μA/MHz)
K4 = Global clock tree current (μA/MHz)
K5 = PLL digital (mA/MHz)
K6 = PLL analog (mA/MHz)
K7 = PLL analog baseline (mA)
DC = Baseline current at 0Mhz (mA)
K8 = CAM frequency component (mA/MHz)
K9 = CAM DC component (mA)
K10 = Current per row decoder (μA/MHz)
Device
K0
2.2
2.2
2.2
2.2
K1
8.4
8.4
8.4
8.4
K2
7
9.4
10.2
13
K3
12
18
21
27.6
K4
100
151
170
200
K5
K6
K7
6.476
6.476
6.476
6.476
DC
ispXPLD
5000MC
16
17
27
35
ispXPLD
5000MV/B
24
25
36
43
ispXPLD 5256
ispXPLD 5512
ispXPLD 5768
ispXPLD 51024
Note: For further information about the use of these coef
fi
cients, refer to technical note TN1031,
Power Estimation in ispXPLD 5000MX
Devices.
0.1379
0.1379
0.1379
0.1379
0.0433
0.0433
0.0433
0.0433
Device
K8
K9
K10
4.4
4.4
4.4
4.4
K11
2.9
2.9
2.9
2.9
ispXPLD 5256
ispXPLD 5512
ispXPLD 5768
ispXPLD 51024
0.004719
0.004719
0.004719
0.004719
0.0924
0.0924
0.0924
0.0924
ispXPLD 5000MC Typical I
CC
vs. Frequency
0
100
200
300
400
500
600
700
800
0
Note: The device is configured with maximum
number of 16-bit counters, no PLL, typical
current at 3.3V (MV) or 2.5V (MB), 25
°
C.
Note: The device is configured with maximum
number of 16-bit counters, no PLL, typical
current at 1.8V, 25
°
C.
100
200
400
Operating Frequency (MHz)
5512MC
5256MC
51024MC
5768MC
M
ispXPLD 5000MV/B Typical I
CC
vs. Frequency
Operating Frequency (MHz)
0
100
200
300
400
500
600
700
800
0
100
200
400
5512V/B
5768MV/B
5256V/B
51024V/B
M
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