參數(shù)資料
型號(hào): LC72121M
廠商: SANYO SEMICONDUCTOR CO LTD
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24
封裝: MFP-24
文件頁(yè)數(shù): 10/23頁(yè)
文件大小: 377K
代理商: LC72121M
Figure 3 Combining with Software
Outputting the unlocked state data in the serial data
At the point of data output 1 in figure 3, the unlocked state data will indicate the unlocked state, since the VCO
frequency is not stable (locked) yet. In cases such as this, the application should wait at least one whole period and then
check again whether or not the frequency has stabilized with the data output 2 operation in the figure. Applications can
implement even more reliable recognition of the locked state by performing several more checks of the state and
requiring that the locked state be detected sequentially.
<Flowchart for Lock Detection>
Directly outputting the unlocked state to the DO pin
Since the unlocked state (high level when locked, low when unlocked) is output from the DO pin, applications can
check for the locked state by waiting at least two reference frequency periods after changing the divisor N. However, in
this case also, even more reliable recognition of the locked state can be achieved by performing several checks of the
state and requiring that the locked state be detected sequentially.
Wait at least 2 reference frequency periods.
Valid output data is acquired by using an interval of at
least one reference frequency period.
*: Even more reliable recognition of the locked state
can be achieved by performing several checks of the
state and requiring that the locked state be detected
sequentially.
Divisor N changed (data input)
Data output (1)
Data output (2)
No. 5815-18/23
LC72121, 72121M, 72121V
Locked state check
*
YES
NO
A10180
相關(guān)PDF資料
PDF描述
LC72121 PLL FREQUENCY SYNTHESIZER, 160 MHz, PDIP22
LC72121V PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24
LC72121M PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24
LC72131M PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO20
LC72134M PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24
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