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參數(shù)資料
| 型號： | LC7218 |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDIP24 |
| 封裝： | DIP-24 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大小： | 282K |
| 代理商： | LC7218 |
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Electrical Characteristics for the Allowable Operating Ranges
Note: A capacitor of at least 2000 pF must be inserted between the power supply VDD and VSS potentials.
No. 4758-5/16
LC7218, 7218M, 7218JM
Parameter
Symbol
Conditions
min
typ
max
Unit
Rf (1)
XIN
1.0
M
Rf (2)
FMIN
500
k
Internal feedback resistance
Rf (3)
AMIN
500
k
Rf (4)
HCTR
500
k
Rf (5)
LCTR
500
k
Hysteresis
VH
LCTR
0.1 VDD
0.6 VDD
V
IIH (1)
CE, CL, DI: VI = 6.5 V
5.0
A
IIH (2)
IN0, IN1: VI = VDD
5.0
A
Input high level current
IIH (3)
XIN: VI = VDD
20
A
IIH (4)
FMIN, AMIN: VI = VDD
40
A
IIH (5)
HCTR, LCTR: VI = VDD
40
A
IIL (1)
CE, CL, DI: VI =VSS
5.0
A
IIL (2)
IN0, IN1: VI = VSS
5.0
A
Input low level current
IIL (3)
XIN: VI = VSS
20
A
IIL (4)
FMIN, AMIN: VI = VSS
40
A
IIL (5)
HCTR, LCTR: VI = VSS
40
A
Output high level voltage
VOH (1)
OUT1, OUT2: IO = –1 mA
VDD – 1.0
V
VOH (2)
PD1, PD2: IO = –0.5 mA
VDD – 1.0
V
VOL (1)
OUT1, OUT2: IO = 1 mA
1.0
V
VOL (2)
PD1, PD2: IO = 0.5 mA
1.0
V
Output low level voltage
VOL (3)
OUT3 to OUT6: IO = 5 mA
1.0
V
VOL (4)
OUT0: IO = 1 mA
1.0
V
VOL (5)
DO: IO = 5 mA
1.0
V
VOL (6)
SYC: IO = 0.5 mA (VDD = 3.5 to 6.5 V)
1.0
V
IOFF (1)
OUT3 to OUT6, OUT0: VO = 13 V
5.0
A
Output off leakage current
IOFF (2)
DO: VO = 6.5 V
5.0
A
IOFF (3)
SYC: VO = 6.5 V (VDD = 3.5 to 6.5 V)
5.0
A
Three-state high level
IOFFH
PD1, PD2: VO = VDD
0.01
10.0
nA
off leakage current
Three-state low level
IOFFL
PD1, PD2: VO = VSS
0.01
10.0
nA
off leakage current
Input capacitance
CIN
FMIN, HCTR
1
2
3
pF
VDD: fIN (2) = 130 MHz, VIN (2) = 70 mVrms,
IDD (1)
with a 7.2 MHz crystal, other input pins at VSS,20
30
mA
Current drain
output pins open
VDD: PLL block stopped (PLL inhibit state), crystal
IDD (2)
oscillator operating (SYC, TB), with a 7.2 MHz crystal,
1.0
mA
other input pins at VSS, output pins open
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