參數(shù)資料
型號: LC72317W
文件頁數(shù): 10/12頁
文件大?。?/td> 128K
代理商: LC72317W
LC72314 Series Instruction Set
Terminology
ADDR
b
C
DH
DL
I
M
N
Rn
Pn
PW
r
( ), [ ]
M (DH, DL) : Data memory specified by DH, DL
: Program memory address
: Borrow
: Carry
: Data memory address High (Row address) [2 bits]
: Data memory address Low (Column address) [4 bits]
: Immediate data [4 bits]
: Data memory address
: Bit position [4 bits]
: Resister number [4 bits]
: Port number [4 bits]
: Port control word number [4 bits]
: General register (One of the addresses from 00H to 0FH of BANK0)
: Contents of register or memory
No. 6650-10/12
LC72314W, 72315W, 72316W
Mnemonic
Operand
Function
Operations function
Instruction format
1st
2nd
AD
r
M
Add M to r
R
(r) + (M)
R
(r) + (M), skip if carry
R
(r) + (M) + C
R
(r) + (M) + C
skip if carry
M
(M) + I
M
(M) + I, skip if carry
M
(M) + I + C
M
(M) + I + C,
skip if carry
R
(r) – (M)
R
(r) – (M),
skip if borrow
R
(r) – (M) – b
R
(r) – (M) – b,
skip if borrow
M
(M) – I
M
(M) – I,
skip if borrow
M
(M) – I – b
M
(M) – I – b,
skip if borrow
ADS
r
M
Add M to r, then skip if carry
AC
r
M
Add M to r with carry
ACS
r
M
Add M to r with carry,
then skip if carry
AI
M
I
Add I to M
AIS
M
I
Add I to M, then skip if carry
AIC
M
I
Add I to M with carry
AICS
M
I
Add I to M with carry,
then skip if carry
SU
r
M
Subtract M from r
SUS
r
M
Subtract M from r,
then skip if borrow
SB
r
M
Subtract M from r with borrow
SBS
r
M
Subtract M from r with borrow,
then skip if borrow
SI
M
I
Subtract I from M
SIS
M
I
Subtract I from M,
SIB
M
I
Subtract I from M with borrow
SIBS
M
I
Subtract I from M with borrow,
then skip if borrow
SEQ
r
M
Skip if r equal to M
(r) – (M), skip if zero
SEQI
M
I
Skip if M equal to I
(M) – I, skip if zero
SNEI
M
I
Skip if M not equal to I
(M) – I, skip if not zero
SGE
r
M
Skip if r is greater than or
equal to M
(r) – (M),
skip if not borrow
SGEI
M
I
Skip if M is greater than
equal to I
(M) – I, skip if not borrow
SLEI
M
I
Skip if M is less than I
(M) – I, skip if borrow
f
e
d
c
b
a
9
8
7
6
5
4
3
2
1
0
0
1
0
0
0
0
DH
DL
r
0
1
0
0
0
1
DH
DL
r
0
1
0
0
1
0
DH
DL
r
0
1
0
0
1
1
DH
DL
r
0
1
0
1
0
0
DH
DL
I
0
1
0
1
0
1
DH
DL
I
0
1
0
1
1
0
DH
DL
I
0
1
0
1
1
1
DH
DL
I
0
1
1
0
0
0
DH
DL
r
0
1
1
0
0
1
DH
DL
r
0
1
1
0
1
0
DH
DL
r
0
1
1
0
1
1
DH
DL
r
0
1
1
1
0
0
DH
DL
I
0
1
1
1
0
1
DH
DL
I
0
1
1
1
1
0
DH
DL
I
0
1
1
1
1
1
DH
DL
I
0
0
0
1
0
0
DH
DL
r
0
0
0
1
1
0
DH
DL
I
0
0
0
0
0
1
DH
DL
I
0
0
0
1
1
0
DH
DL
r
0
0
0
1
1
1
DH
DL
I
0
0
0
0
1
1
DH
DL
I
I
g
Continued on next page.
A
S
C
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