參數(shù)資料
型號: LC72341G
廠商: Sanyo Electric Co.,Ltd.
英文描述: Low-Voltage Single-Chip Microcontrollers with On-Chip PLL and LCD Driver Circuits(用于音頻設(shè)備的低電壓單片微控制器(帶片上鎖相環(huán)電路和LCD驅(qū)動器))
中文描述: 低電壓的單芯片微控制器芯片PLL和LCD驅(qū)動電路(用于音頻設(shè)備的低電壓單片微控制器(帶片上鎖相環(huán)電路和液晶顯示驅(qū)動器))
文件頁數(shù): 9/12頁
文件大小: 171K
代理商: LC72341G
No. 5799-9/12
LC72341G/W, 72342G/W, 72343G/W
Pin No.
Pin
I/O
Function
I/O circuit
56
FMIN
I
FM VCO (local oscillator) input.
This pin is selected with the PLL instruction CW1.
The input must be capacitor coupled.
Input is disabled in backup mode, in halt mode, after a reset, and in PLL stop mode.
57
AMIN
I
AM VCO (local oscillator) input.
This pin and the bandwidth are selected with the PLL instruction CW1.
The input must be capacitor coupled.
Input is disabled in backup mode, in halt mode, after a reset, and in PLL stop mode.
59
E0
O
The main charge pump output. When the local oscillator frequency divided by N is higher
than the reference frequency a high level is output, when lower, a low level is output, and
the pin is set to the high-impedance state when the frequencies match.
Output goes to the high-impedance state in backup mode, in halt mode, after a reset, and
in PLL stop mode.
60
61
62
AIN
AOUT
AGND
O
Transistor used for the low-pass filter amplifier.
Connect AGND to ground.
24
58
55
V
SS
V
SS
V
DD
Power supply pin. This pin must be connected to ground.
Power supply pin. This pin must be connected to ground.
Power supply pin. This pin must be connected to V
DD
.
Continued from preceding page.
CW1
b1,
b0
Bandwidth
1
0
2 to 40 MHz (SW)
1
1
0.5 to 10 MHz (MW, LW)
CMOS amplifier input
CMOS amplifier input
Push-pull CMOS
output
Handling of Unused Pins
Pin No.
3 to 6
7 to 10
11 to 14
15 to 18
19, 20
21 to 23
25 to 28 PG/S ports
29 to 32 PH/S ports
33 to 41
45 to 48
49
50
51
52
53
54
56
57
59
60
61
63
2
Pin
I/O type
I
O
I/O
I/O
O
I
I/O/S
I/O/S
O
O
I
I
I
I
O
I
O
I
I
Pin handling
PA port
PB port
PC port
PD port
PE port
PF port
Connect to V
DD
or V
SS
. May be left open if the pull-up resistor is selected with the IOS instruction.
Open
Connect to V
DD
or V
SS
when input is selected. Leave open if output is selected.
Connect to V
DD
or V
SS
when input is selected. Leave open if output is selected.
Open
Connect to V
DD
or V
SS
. The PF2 pin only may be left open if the pull-up resistor is selected with the IOS instruction.
Connect to V
DD
or V
SS
when input is selected. Leave open if output or LCD operation is selected.
Connect to V
DD
or V
SS
when input is selected. Leave open if output or LCD operation is selected.
Open
Open
Connect to DBR2 through a capacitor.
Connect to DBR1 through a capacitor.
Connect to V
SS
through a capacitor.
Connect to V
SS
through a capacitor.
V
DD
V
SS
Leave open if FMIN is used.
V
SS
V
SS
Open
V
SS
Open
Connect to V
SS
or leave open. Connection to V
SS
is preferable.
Connect to V
SS
or leave open. Connection to V
SS
is preferable.
S port
COM
DBR1
DBR2
DBR3
DBR4
RES
HCTR
FMIN
AMIN
EO
AIN
AOUT
TEST1
TEST2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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