No. 5876-12/16
LC72709E, 72709W
Figure 3 Timing of Data Reception and Block Synchronization Data Output
Figure 4 Post-Vertical Correction Data Output Timing
Packet (N – 1)
Reception data
Packet data N
Packet (N + 1)
Output period for packet data (N – 1)
Period that data cannot be
guaranteed
Output of packet data N
Frame N – 1
Reception block
number
Frame N
Output period for the post-vertical
correction data from the previous frame
Notes on Output Data Selection During Tuning (Provided for reference purposes.)
A tuning system is required in an FM multiplex broadcast reception system. However, applications must perform the
following processing if it is unacceptable for the IC to output data for the previous station after tuning a new station.
Set bit 4 (SYNC RST) in the control register during tuning to set the synchronization circuit to the unsynchronized state.
If bit 5 (INT) in the control register is enabled, do not use the post-vertical correction output (data for which bit 7 in the
status flags CNT1 is 1) until frame synchronization is re-established.
Of the DARC FM multiplex processing, this IC performs the processing through error correction (layer 2) without
requiring any special control operations. The IC itself is not able to recognize whether the content of the received data
has changed or whether the system has been tuned to another station. Therefore the application system must use the
above procedure to command the IC not to output the old data and only to output the new data. The synchronization
relationship between the stations is also problematic; although it is rare that the frames of the previous station and the
next station would be synchronized, applications must also perform the processing described above to cancel the frame
synchronization forward protection period.
Differences in Data Output between this IC and the LC72700E (Provided for reference purposes.)
The LC72700E provided all data that could be provided to the microcontroller in the later stages of the system, and was
designed so that the microcontroller was required to decide whether to accept or discard the data by checking the status
output. For example, a received data packet could be output as post-horizontal correction data and then again, a few
seconds later, could be output as post-vertical correction data. Data with no errors, or data that could be corrected by
horizontal correction was output twice as identical data. This IC implements the conditions shown on page 12 (in “Notes