CMOS LSI
Ordering number : EN *5602
N2897HA (OT) No. 5602-1/14
Preliminary
LC72720, 72720M
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
Overview
The LC72720 and LC72720M are single-chip system LSIs
that implement the signal processing required by the
European Broadcasting Union RDS (Radio Data System)
standard and by the US NRSC (National Radio System
Committee) RDBS (Radio Broadcast Data System)
standard. These LSIs include band-pass filter,
demodulator, synchronization, and error correction circuits
as well as data buffer RAM on chip and perform effective
error correction using a soft-decision error correction
technique.
Functions
Band-pass filter: Switched capacitor filter (SCF)
Demodulator: RDS data clock regeneration and
demodulated data reliability information
Synchronization: Block synchronization detection (with
variable backward and forward protection conditions)
Error correction: Soft-decision/hard-decision error
correction
Buffer RAM: Adequate for 24 blocks of data (about 500
ms) and flag memory
Data I/O: CCB interface (power on reset)
Features
Error correction capability improved by soft-decision
error correction
The load on the control microprocessor can be reduced
by storing decoded data in the on-chip data buffer RAM.
Two synchronization detection circuits provide
continuous and stable detection of the synchronization
timing.
Data can be read out starting with the backward-
protection block data after a synchronization reset.
Fully adjustment free
Operating power-supply voltage: 4.5 to 5.5 V
Operating temperature: –40 to +85°C
Package: DIP24S, MFP24
Package Dimensions
unit: mm
3067-DIP24S
unit: mm
3045B-MFP24
SANYO: DIP24S
[LC72720]
SANYO: MFP24
[LC72720M]
CCB is a trademark of SANYO ELECTRIC CO., LTD.
CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Single-Chip RDS
Signal-Processing System LSI