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參數(shù)資料
| 型號： | LC72720NM |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO24 |
| 封裝： | MFP-24 |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 205K |
| 代理商： | LC72720NM |
No. 5877-9/14
LC72720N, 72720NM
8. RDS/RBDS (MMBS) selection (1 bit): RM
Initial value: RM = 0
—: Open, q
q, q: Output enabled (q = reverse polarity)
Initial values: PT0 = 1, PT1 = 1, PT2 = 0 (mode 3)
Note: 1. When PT2 is set to 1, the polarity of the T3 (RDCL), T6 (ERROR/57K), T7 (CORREC/ARI-ID) SYNC, and RDS-ID pins changes to active
high.
2. The output pins (T3 to T7, SYNC, and RDS-ID) are all open-drain pins, and require external pull-up resistors to output data.
These pins indicate the number of blocks in a set of 48 blocks that had errors before correction. The output polarity of these pins is fixed at the values
listed in the table.
RM
RBDS support
Decoding method
0
None
Only RDS data is decoded correctly (Offset word E is not detected.)
1
Provided
RDS and MMBS data is decoded correctly (Offset word E is also detected.)
9. Output pin settings (3 bits): PT0 to PT2
These bits control the T3, T4, T5, T6, T7, SYNC, and RDS-ID pins.
P
T3
T4
T5
T6
T7
Mode
T
0
1
2
RDCL
RDDA
RSFT
ERROR
57K
BE1
CORREC
ARI-ID
BE0
0
—
1
0
q
—
2
0
1
0
q
—
q
—
q
—
3
1
0
q
—
q
—
4
0
1
—
q
—
q
5
1
0
1
q
—
6
0
1
q
—
q
—
q
—
7
1
q
—
q
—
Pin T3 (RDCL)
PT2 = 0
Data (RDDA and RSFT) changes on this pin’s rising edge.
PT2 = 1
Data (RDDA and RSFT) changes on this pin’s falling edge.
Mode 2 (PT2 = 0)
Pin T7 (ARI-ID)
No SK
High (1)
SK present
Low (0)
Mode 3 (PT2 = 0)
Pin T6 (ERROR)
Pin T7 (CORREC)
Correction not possible
Low (0)
Errors corrected
High (1)
Low (0)
No errors
High (1)
Mode 4
Pin T6 (BE1)
Pin T7 (BE0)
Number of error blocks (B)
B = 0
Low (0)
1
≤ B ≤ 20
Low (0)
High (1)
20 < B
≤ 40
High (1)
Low (0)
40 < B
≤ 48
High (1)
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