參數(shù)資料
型號(hào): LC74731W
廠商: SANYO SEMICONDUCTOR CO LTD
元件分類: 畫(huà)面疊加
英文描述: ON-SCREEN DISPLAY IC, PQFP64
封裝: SQFP-64
文件頁(yè)數(shù): 14/38頁(yè)
文件大?。?/td> 153K
代理商: LC74731W
No. 6526-21/38
LC74731W
COMMAND51 (Sync signal detection 2 setup command)
First byte
DA0 to 7
Register
Content
Notes
State
Function
7
1
Command 5 identification code
6
1
Display control settings
5—
0
4—
1
3
0
Extended command 1 identification code
2—
1
MUT1
0
MUT1 MUT0
Output
Video signal output muting function selection
1
0
CSYNC
Valid when the MUTE pin is low.
0
MUT0
00
1
PE
1
0
A0-17 “Z”
Second byte
Note that all registers are set to 0 when the LC74731W is reset by the RST pin.
DA0 to 7
Register
Content
Notes
State
Function
7
0
Second byte identification bit
6—
0
Sync signal no signal to signal present discrimination - Normal
5
RNE0
values
1
Sync signal no signal to signal present discrimination - Values
shown in parentheses
4
SJNS3
0
SJNS3
SJNS2
SJNS1
Times
1
0
None
3
SJNS2
00
0
1
4
10
1
0
8
00
1
16
100
32
2
SJNS1
1
101
64
1
0
128
1
256
1
SJCS1
0
SJCS1
SJCS0
PAL
NTSC
1
0
677 ns (1/3)
558 ns (1/2)
0
SJCS0
0
1
903 ns (1/4)
838 ns (1/3)
1
0
450 ns (1/2)
1117 ns (1/4)
Noise ignoring circuit setting for sync signal
recognition for the no signal to signal present
transition
If more than the number of horizontal signals
shown at the left are input during a 1H period, the
circuit recognizes a no signal state.
Synchronization discrimination
Selects the clock used to delimit the HSYNI signal.
Changes the judgment criterion values for sync
signal recognition for the no signal to signal
present transition. (COM50)
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