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參數(shù)資料
| 型號： | LC74751 |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDIP22 |
| 封裝： | SDIP-22 |
| 文件頁數(shù)： | 5/15頁 |
| 文件大?。?/td> | 540K |
| 代理商： | LC74751 |
No. 5396-13/15
LC74751
Display Screen Structure (Display Example)
Specify the display of line 12 for display line ROM (64 lines).
From within line ROM, specify display control RAM for the sections where the characters are variable.
The addresses in display control RAM are automatically allocated in display order from 0 to 175 (AF hexadecimal).
Items enclosed in thick lines specify characters in display control RAM, and
items enclosed in thin lines are character specified in line ROM.
Control Data External Input Timing
Data is input in a 16-bit serial format that includes both an address and data items.
①An address has 16 bits.
The lower 8 bits are the valid address bits. The upper 8 bits must be set to 0.
②Data consists of 16 bits.
For addresses 000 to 0AF (hexadecimal) the lower 8 bits are valid data. The upper 8 bits must be set to 0.
For addresses 0B0 to 0BB (hexadecimal) the lower 11 bits are valid data. The upper 5 bits must be set to 0.
For addresses 0BC to 0BF (hexadecimal) the lower 12 bits are valid data. The upper 4 bits must be set to 0.
③When data is input, the first 16 bits after the fall of the CS signal are acquired as the address, and then data is acquired
in 16-bit units. The address is automatically incremented ever 16 bits.
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| LC7475 | ON-SCREEN DISPLAY IC, PDIP22 |
| LC74760 | ON-SCREEN DISPLAY IC, PDIP30 |
| LC74760M | ON-SCREEN DISPLAY IC, PDSO30 |
| LC74761 | ON-SCREEN DISPLAY IC, PDIP30 |
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相關代理商/技術參數(shù) |
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| LC74759JM-9820-TRM-E | 制造商:SANYO Semiconductor Co Ltd 功能描述:ELECTRONIC COMPONENT |
| LC74760 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display IC |
| LC74760M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display IC |
| LC74761 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display LSI |
| LC74761_11 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display LSI |
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