參數(shù)資料
型號: LC74772V
廠商: Sanyo Electric Co.,Ltd.
英文描述: Camcorder On-Screen Display LSI
中文描述: 攝像機屏幕顯示大規(guī)模集成電路
文件頁數(shù): 8/16頁
文件大?。?/td> 176K
代理商: LC74772V
y
COMMAND 1 (System control setup 2)
First byte
z
COMMAND 2 (Input control)
First byte
No. 5159-8/16
LC74772V
Register content
DA0 to DA7
Register name
State
Function
Note
7
0
6
0
Command 1 identification code
5
0
4
1
0
HSYNC (pin 22) functions as the horizontal synchronizing
signal input
3
CSYN
MOD
1
HSYNC (pin 22) functions as the composite synchronizing
signal input
CLK
POLT
0
The system clock has a positive polarity.
2
1
The system clock has a negative polarity.
0
1
CLK
MOD1
1
0
0
CLK
MOD0
1
Valid when the CTRL1 pin (pin 4) is high.
The input clock frequency in clock input
mode is either 4fsc or the dot clock
frequency.
This sets the clock polarity for system
operation when pin 2 is used as a clock
input.
The VSYNC pin (pin 21) must be tied to
ground or V
DD
in composite
synchronizing signal input mode.
MOD1
MOD0
Operation
0
0
LC oscillator mode
0
1
Clock input (1 dot)
1
0
Clock input (NTSC)
1
1
Clock input (PAL)
Register content
DA0 to DA7
Register name
State
Function
Note
7
0
6
0
Command 2 identification code
5
1
4
0
3
VSYN
POLT
0
The vertical synchronizing signal input polarity is low active.
Sets the pin 21 (VSYNC) signal input
polarity.
1
The vertical synchronizing signal input polarity is high active.
2
HSYN
POLT
0
The horizontal synchronizing signal input polarity is low active.
Sets the pin 22 (HSYNC) signal input
polarity.
1
The horizontal synchronizing signal input polarity is high active.
0
Data is transferred in 16-bit units.
1
DATA
FMT
Sets the COMMAND 14 data transfer
format.
1
Continuous transfers with the upper 8 bits input first and then
the lower 8 bits
0
ATR
FMT
0
RV specifies the reverse video display function.
COMMAND-14 Data 11: Valid in RV
RGB output mode.
1
RV specifies system 3 output control.
Note: This register is set to 0 on a reset (either by the RST pin or by a command reset).
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