參數資料
型號： LC74775M
廠商： Sanyo Electric Co.,Ltd.
英文描述： On-Screen Display Controller IC
中文描述： 屏幕顯示控制器IC
文件頁數： 4/35頁
文件大?。?/td> 258K
代理商： LC74775M
Absolute Maximum Ratings
No. 5919-4/35
LC74775, 74775M
Paremeter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
V
DD
max
V
IN
max
V
OUT
max
Pd max
V
DD
1, V
DD
2, and V
DD
3
All input pins
V
SS
– 0.3 to V
SS
+ 6.5
V
SS
– 0.3 to V
DD
1 + 0.3
V
SS
– 0.3 to V
DD
1 + 0.3
V
Maximum input voltage
V
Maximum output voltage
SDA, SYNC
JDG
, and SEP
OUT
Ta = 25°C
V
Allowable power dissipation
350
mW
Operating temperature
Topr
–30 to + 70
°C
Storage temperature
Tstg
–40 to + 125
°C
Continued on next page.
Allowable Operating Ranges
Ratings
Paremeter
Symbol
Conditions
min
typ
max
Unit
Supply voltage
V
DD
1
V
DD
2
V
IH
1
V
IH
2
V
IH
3
V
DD
1, V
DD
3
V
DD
2
CS, SIN, SCLK, SDA, SCL,
4.5
5.0
5.5
V
4.5
5.0
6.5
V
0.8V
DD
1
0.8V
DD
1
0.7V
DD
1
5.5
V
Input high-level voltage
RST, MUTE
V
DD
1 + 0.3
V
DD
1 + 0.3
V
CTRL1
V
V
IL
1
RST, CS, SIN, SCLK, SDA, SCL,
MUTE
V
SS
– 0.3
0.2V
DD
1
V
Input low-level voltage
V
IL
2
CTRL1
V
SS
– 0.3
0.3V
DD
1
V
Pull-up resistance
R
PU
RST, CS, SIN, SCLK, MUTE
Applies to pins set up by options.
25
50
90
k
Composite video signal
input voltage
V
IN
1
V
IN
2
CV
IN
, CV
CR
: V
DD
1 = 5V
SYN
IN
: V
DD
1 = 5V
2.0
Vp-p
1.5
2.0
2.5
Vp-p
Input voltage
V
IN
3
Xtal
(when used for external clock input)
f
IN
= 2fsc or 4fsc: V
DD
1= 5V
0.10
5.0
Vp-p
f
OSC
1
f
OSC
2
f
OSC
3
Xtal
IN
and Xtal
OUT
oscillator pins (2fsc: PAL)
Xtal
IN
and Xtal
OUT
oscillator pins (4fsc: PAL)
OSC
IN
and OSC
OUT
oscillator pins (LC oscillator)
8.867
MHz
Oscillator frequencies
17.734
MHz
5
10
MHz
Note: Applications must be especially cautious about noise when using the Xtal
IN
input pin in clock input mode.
Electrical Characteristics
at Ta = –30 to +70°C, V
DD
1 = 5 V unless otherwise specified
Ratings
Paremeter
Symbol
Conditions
min
typ
max
Unit
Input off leakage current
I
leak
1
I
leak
2
CV
IN
, CV
CR
CV
OUT
, SDA
1
μA
Output off leakage current
1
μA
Output high-level voltage
V
OH
1
SEP
, CP
OUT
, SYNC
V
DD
1 = 4.5V, I
OH
= –1.0 mA
3.5
V
V
OL
1
SEP
, CP
, SYNC
V
DD
1 = 4.5 V, I
OL
= 1.0 mA
1.0
V
Output low-level voltage
V
OL
2
SDA: V
DD
1 = 5.0V, I
OL
= 3.0 mA
0.4
V
H
3.3
5.0
V
Three-value output voltage
V
O
CHABLK: V
DD
1 = 5.0 V
M
1.8
2.3
V
L
0
0.8
V
I
IH
RST, CS, SIN, SCLK, SDA, SCL, CTRL1,
MUTE, VCOIN: V
IN
= V
DD
1
1
μA
Input current
I
IL
CTRL1, SDA, SCL, VCOIN
V
IN
= V
SS
1
–1
μA
I
DD
1
V
1 and V
3: With all outputs open
Xtal: 17.734 MHz, LC: 8 MHz
40
mA
Operating mode current drain
I
DD
2
V
DD
2: V
DD
2 = 5 V
20
mA
CV
OUT
: V
DD
1 = 5.0 V,
V
DD
2 = 5.0 V
(1)
0.80
V
SYNC level
V
SN
(2)
1.00
V
(3)
1.40
V
CV
OUT
: V
DD
1 = 5.0 V,
V
DD
2 = 5.0 V
(1)
1.37
V
Pedestal level
V
PD
(2)
1.57
V
(3)
1.97
V
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