參數(shù)資料
型號: LC74784
廠商: Sanyo Electric Co.,Ltd.
英文描述: On-Screen Display Controller LSI for VCR Products(用于錄象機(jī)的屏幕顯示控制器的大規(guī)模集成電路(LSI))
中文描述: 屏幕顯示控制器芯片的錄像機(jī)產(chǎn)品(用于錄象機(jī)的屏幕顯示控制器的大規(guī)模集成電路(LSI)的)
文件頁數(shù): 2/17頁
文件大?。?/td> 187K
代理商: LC74784
Pin Functions
No. 4991-2/15
LC74784, 74784M
Pin No.
Symbol
Function
Description
1
V
SS
1
Xtal
IN
Xtal
OUT
Ground
Ground connection (digital system ground)
2
Crystal oscillator connection
Used to connect the crystal oscillator and capacitor used to generate the internal
synchronization signal, or to input an external clock (2fsc or 4fsc).
3
4
CTRL1
Crystal oscillator input switching
Switches between external clock input mode and crystal oscillator mode.
Low = crystal oscillator mode, high = external clock mode
Outputs the blank signal (the OR of the character and border signals). (Outputs a composite
sync signal when MOD0 is high.) Outputs the crystal oscillator clock during reset (when the
RST pin is low), but can be set up to not output this signal by microprocessor command.
5
BLANK
Blanking output
6
OSC
IN
OSC
OUT
LC oscillator connection
Connections for the coil and capacitor that form the oscillator that generates the character
output dot clock.
7
Outputs the character signal. (Functions as the external synchronization signal discrimination
signal output pin when MOD0 is high, and outputs the state of the judgment as to whether the
external synchronization signal is present or not. Outputs a high level when the synchronization
signal is present.) Outputs the dot clock (LC oscillator) during reset, but can be set up to not
output this signal by microprocessor command.
8
CHARA
Character output
9
CS
Enable input
Serial data input enable input. Serial data input is enabled when low. A pull-up resistor is built in
(hysteresis input).
10
SCLK
Clock input
Serial data input clock input.
A pull-up resistor is built in (hysteresis input).
11
SIN
Data input
Serial data input. A pull-up resistor is built in (hysteresis input).
12
V
DD
2
CV
OUT
NC
Power supply
Composite video signal level adjustment power supply pin (analog system power supply).
13
Video signal output
Composite video signal output
14
Must be either connected to ground or left open.
15
CV
IN
CV
CR
V
DD
1
Video signal input
Composite video signal input
16
Video signal input
SECAM chrominance signal input
17
Power supply
Power supply (+5 V: digital system power supply)
Video signal input for the built-in sync separator circuit (Used for either horizontal
synchronization signal or composite sync signal input when the built-in sync separator circuit is
not used.)
18
SYN
IN
Sync separator circuit input
19
SEP
C
Sync separator circuit bias voltage
Built-in sync separator circuit bias voltage monitor pin
Built-in sync separator circuit composite sync signal output. (When MOD1 is high, outputs a high
level during internal synchronization and a low level during external synchronization.) (Outputs
the SYN
IN
input signal when the internal sync separator circuit is not used.)
Inputs a vertical synchronization signal created by integrating the SEP
OUT
pin output signal. An
integrator must be attached at the SEP
OUT
pin. This pin must be tied to V
DD
1 if unused.
Controls whether or not the VSYNC signal is input to the SEP
IN
input. Low = VSYNC input,
high = VSYNC not input.
20
SEP
OUT
Composite sync signal output
21
SEP
IN
Vertical synchronization
signal input
22
CTRL3
SEP
IN
input control
23
RST
Reset input
System reset input. A pull-up resistor is built in (hysteresis input).
24
V
DD
1
Power supply (+5 V)
Power supply (+5 V: digital system power supply)
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