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參數(shù)資料
| 型號(hào)： | LC74793 |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP24 |
| 封裝： | SDIP-24 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 154K |
| 代理商： | LC74793 |
No. 5966-3/24
LC74793, 74793JM
Pin Functions
Pin No.
Pin
Function
Description
1
VSS1
Ground
Digital system ground
2
Xtalin
Crystal oscillator connections
Connections for the crystal element and capacitors that form the crystal oscillator. Also
3
Xtalout
used for external clock input (fsc, 2fsc, or 4fsc).
4
CTRL1
Crystal element switching
Switches between external clock input mode and crystal oscillator mode. Set this pin low
for crystal oscillator, and high for external clock input.
5
NC
Data I/O
PDC/VPS data I/O.
6
SDA
I2C bus
I2C bus write address: 01111100
I2C bus read address: 01111101
7
SCL
Clock input
PDC/VPS data clock input.
I2C bus
External synchronizing signal presence/absence discrimination status output.
8
SYNCJDG
External synchronizing signal
A high level is output when synchronizing signals are present.
discrimination output
This pin outputs the crystal oscillator clock when the RST pin is low.
(This reset state output can be disabled with command input.)
9
Hout
Horizontal synchronizing signal output
10
VSS2
Ground
Ground. (VCO circuit ground)
11
CPOUT
Charge pump output
Charge pump output. Connect a low-pass filter to this pin.
12
VCOIN
Oscillator control voltage input
VCO oscillation control voltage input
13
VCOR
Oscillator range adjustment
VCO oscillation range adjustment resistor connection
14
DAV
Data acquisition output
Outputs a low level when PDC/VPS data has been discriminated
15
VDD2
Power supply (+5 V)
Power supply (+5 V) (VCO system power supply)
16
SYNin
Sync separator circuit input
Internal sync separator circuit video signal input
17
SEPC
Slice level output
Slice level verification
18
SEPOUT
Composite synchronizing signal output
Internal sync separator circuit composite synchronizing signal output
Inputs the vertical synchronizing signal by integrating the SEP out pin output signal.
19
SEPIN
Vertical synchronizing signal input
Applications must connect the SEP out pin to this pin through an integration circuit. If
unused, connect this pin to VDD1. (This pin is enabled when CTRL2 is high.)
Vertical synchronizing signal output
20
Vout
Vertical synchronizing signal output
This pin outputs the VCO clock when the RST pin is low.
(This reset state output can be disabled with command input.)
Controls whether or not the VSYNC vertical synchronizing signal is input to the SEPin
21
CTRL2
SEPin input control
input.
When low: The VSYNC signal is not input. (The internal vertical separation circuit is used.)
When high: The VSYNC signal is input.
22
CDLR
Clock phase adjustment
Connection for the clock phase adjustment resistor.
23
RST
Reset input
System reset input.
A pull-up resistor is built in. (This input has hysteresis characteristics.)
24
VDD1
Power supply (+5 V)
Power supply. (+5 V: digital system power supply)
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| LC74793JM | SPECIALTY CONSUMER CIRCUIT, PDSO24 |
| LC74793 | SPECIALTY CONSUMER CIRCUIT, PDIP24 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC74793JM | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:VPS / PDC Slicer IC |
| LC74793JM-TLM-E | 制造商:ON Semiconductor 功能描述:Data Converter ICs - Various VPS/PDC SLICER IC 制造商:ON Semiconductor 功能描述:REEL / VPS/PDC SLICER IC |
| LC74794 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller LSI |
| LC74794M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller LSI |
| LC74795 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller LSI |
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