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參數(shù)資料
| 型號(hào)： | LC74799M |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDSO30 |
| 封裝： | 0.375 INCH, MFP-30 |
| 文件頁(yè)數(shù)： | 18/32頁(yè) |
| 文件大?。?/td> | 322K |
| 代理商： | LC74799M |
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No. 5834-25/32
LC74799, 74799M
COMMAND17 (VPS/PDC control setup command) Only using the I2C bus
First byte
DA
Register
Contents
Notes
0 to 7
State
Function
7—
1
6—
1
5—
1
4—
1
3—
1
2—
0
1—
0
0—
1
Command 7 identification code.
Display control setup.
Extended command 9 identification code
Second byte
Note: All registers are set to 0 when the LC74799/M is reset by the RST pin.
DA
Register
Contents
Notes
0 to 7
State
Function
7—
0Second byte identification bit
6—
0
5
ECP25
0
1
4
ECP24
0Byte 24 Hamming error check on (Data hold)
1Byte 24 Hamming error check off (Data write)
3
ECP23
0Byte 23 Hamming error check on (Data hold)
1Byte 23 Hamming error check off (Data write)
2
ECP22
0
1
ECP21
0
1
0
ECP20
0
1
Specification when the PDC data (8/30/2) BMS bit
is 0.
The item in parentheses is the specification when
the BMS bit is 1.
The item in curly braces lists the odd parity check
off bytes for header modes 1, 2, 3, and 4 and
status mode 1, 2, 3, and 4.
Byte 22 Hamming error check on (Data hold)
{Bytes -, -, -, -, 35, 45, 35, and 45}
Byte 22 Hamming error check off (Data write)
{Bytes -, -, -, -, 35, 45, 35, and 45}
Byte 21 Hamming error check on (Data hold)
{Bytes -, -, -, -, 34, 44, 34, and 44}
Byte 21 Hamming error check off (Data write)
{Bytes -, -, -, -, 34, 44, 34, and 44}
Byte 20 Hamming error check on (Data hold)
{Bytes 45, 29, 37, 21, 33, 43, 33, and 43}
Byte 20 Hamming error check off (Data write)
{Bytes 45, 29, 37, 21, 33, 43, 33, and 43}
Byte 25 Hamming error check on (Data hold)
Byte 25 Hamming error check off (Data write)
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